Patents by Inventor Yogesh Sethi

Yogesh Sethi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230370984
    Abstract: Communication systems and methods are disclosed herein. In an embodiment, a communication system includes a grandmaster clock and a modem unit. The grandmaster clock is configured to output a primary clock reference based on a received signal. The modem unit is configured for communication with a remote terminal. The modem unit includes a network clock configured to be tuned based on the primary clock reference. The network clock is further configured to output a first signal to be used for a time reference for communications with the remote terminal. The modern unit also includes a master clock configured to be tuned based on the primary clock reference. The master clock is further configured to output a second signal to be used for a frequency reference for communications with the remote terminal.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 16, 2023
    Inventors: Nimesh AMBESKAR, Jack LUNDSTEDT, Yogesh SETHI, Patrick O'NEIL, Tyler HORWAT
  • Patent number: 11636036
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: April 25, 2023
    Assignee: Hughes Network Systems, LLC
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Patent number: 11621770
    Abstract: A field-programmable gate array includes a memory, a firmware state machine, a register, and an interconnect structure. The memory is configured to store a plurality of configurations. Each of the plurality of configurations has at least one parameter associated therewith. The firmware state machine is configured to read the parameters stored in the memory. The register is configured to have the parameters associated with the plurality of configurations written thereto. The interconnect structure is configured to transmit the parameters between the firmware state machine and the register. The interconnect structure is configured to receive the parameters associated with the plurality of the configurations simultaneously and the interconnect structure is configured to transmit the received parameters associated with the plurality of configurations to the register simultaneously.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: April 4, 2023
    Assignee: HUGHES NETWORK SYSTEMS, LLC
    Inventor: Yogesh Sethi
  • Patent number: 11436172
    Abstract: Disclosed herein is a system including a network interface arranged to receive a data frame from one or more communication networks. A frame filter is arranged to receive the data frame from the network interface, wherein the frame filter selectively outputs the data frame to at least one of a second network interface or a direct memory access (DMA) controller based on a data frame type. The DMA controller is arranged to store a received data frame to shared memory and transmit an interrupt signal to a media access control (MAC) driver after the received data frame is stored in the shared memory so that the MAC driver can initiate an interrupt handler in response to the interrupt signal to retrieve the stored data frame.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: September 6, 2022
    Assignee: Hughes Network Systems, LLC
    Inventors: Dan Hantz, Nimesh Ambeskar, Yogesh Sethi, Vivek Gupta, Patrick O'Neil
  • Publication number: 20220222179
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Application
    Filed: January 28, 2022
    Publication date: July 14, 2022
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Patent number: 11336493
    Abstract: A system includes a processor and a memory. The memory stores instructions executable by the processor to identify an equalization response for equalizing an output signal of a modulator of a satellite gateway, generate a compensation response based on the equalization response and a sample rate of a pre-distorter of the modulator, and send the equalization response to the pre-distorter.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: May 17, 2022
    Assignee: Hughes Network Systems, LLC
    Inventors: Kumudchandra Patel, Robert Kepley, Jack Edwin Lundstedt, Jr., Yogesh Sethi, Gaurav Bhatia, Vinay Gandla
  • Patent number: 11323195
    Abstract: A communication system includes a Precision Time Protocol (PTP) grandmaster configured to provide a PTP clock reference via a PTP network, and a server connected to the PTP grandmaster via the PTP network, the server being configured to generate a frame event and a frame number for a frame synchronization based on a synchronization to the PTP clock reference using PTP.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: May 3, 2022
    Assignee: HUGHES NETWORK SYSTEMS, LLC
    Inventors: Nimesh Ambeskar, Akash Gaikwad, Yogesh Sethi
  • Publication number: 20220091981
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Patent number: 11281583
    Abstract: Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: March 22, 2022
    Assignee: Hughes Network Systems, LLC
    Inventors: Gaurav Bhatia, Daniel C. Hantz, Ashish A. Varhale, Karan Kakkar, Yingquan Cheng, Yogesh Sethi
  • Publication number: 20220083485
    Abstract: Disclosed herein is a system including a network interface arranged to receive a data frame from one or more communication networks. A frame filter is arranged to receive the data frame from the network interface, wherein the frame filter selectively outputs the data frame to at least one of a second network interface or a direct memory access (DMA) controller based on a data frame type. The DMA controller is arranged to store a received data frame to shared memory and transmit an interrupt signal to a media access control (MAC) driver after the received data frame is stored in the shared memory so that the MAC driver can initiate an interrupt handler in response to the interrupt signal to retrieve the stored data frame.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Inventors: Dan Hantz, Nimesh Ambeskar, Yogesh Sethi, Vivek Gupta, Patrick O'Neil
  • Patent number: 11075693
    Abstract: Systems and methods are disclosed, and one includes receiving an encoded data stream, generating a first upsampled encoded block, based on a first upsampling rate upsampling of a first content from the data stream, communicating the first upsampled encoded block to a beam hopping satellite, on an uplink, during an uplink first time interval having a synchronization with a first beam of the beam hopping satellite, as a feed for the first beam. The systems may further include generating, starting at a time within the uplink first time interval, a second upsampled encoded block, based on a second upsampling rate upsampling of a second content from the data stream, and communicating the second upsampled encoded block via the uplink to the beam hopping satellite, during an uplink second time interval having a synchronization with a second beam of the beam hopping satellite, as a feed for the second beam.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: July 27, 2021
    Assignee: Hughes Network Systems, LLC
    Inventors: Murali Regunathan, Yogesh Sethi
  • Patent number: 11071112
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for adjusting communication channel bandwidth. In some implementations, a method includes determining to change a bandwidth of a wireless communication channel on which a transmitter and receiver communicate. In response, and while the transmitter and the receiver maintain data communication on the wireless communication channel, a target value and rate of change is determined for each of one or more communication parameters of the wireless communication channel. The rate of change is a rate at which the communication parameter can be changed over time while continuing to transfer data on the wireless communication channel. Data is provided to the transmitter. The data can cause, for each communication parameter, the transmitter to gradually adjust the communication parameter using the rate of change until the communication parameter reaches the target value.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: July 20, 2021
    Assignee: Hughes Network Systems, LLC
    Inventor: Yogesh Sethi
  • Publication number: 20210203427
    Abstract: A communication system includes a Precision Time Protocol (PTP) grandmaster configured to provide a PTP clock reference via a PTP network, and a server connected to the PTP grandmaster via the PTP network, the server being configured to generate a frame event and a frame number for a frame synchronization based on a synchronization to the PTP clock reference using PTP.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Nimesh AMBESKAR, Akash GAIKWAD, Yogesh SETHI
  • Publication number: 20210199718
    Abstract: A field-programmable gate array includes a memory, a firmware state machine, a register, and an interconnect structure. The memory is configured to store a plurality of configurations. Each of the plurality of configurations has at least one parameter associated therewith. The firmware state machine is configured to read the parameters stored in the memory. The register is configured to have the parameters associated with the plurality of configurations written thereto. The interconnect structure is configured to transmit the parameters between the firmware state machine and the register. The interconnect structure is configured to receive the parameters associated with the plurality of the configurations simultaneously and the interconnect structure is configured to transmit the received parameters associated with the plurality of configurations to the register simultaneously.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 1, 2021
    Inventor: Yogesh SETHI
  • Publication number: 20200236678
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for adjusting communication channel bandwidth. In some implementations, a method includes determining to change a bandwidth of a wireless communication channel on which a transmitter and receiver communicate. In response, and while the transmitter and the receiver maintain data communication on the wireless communication channel, a target value and rate of change is determined for each of one or more communication parameters of the wireless communication channel. The rate of change is a rate at which the communication parameter can be changed over time while continuing to transfer data on the wireless communication channel. Data is provided to the transmitter. The data can cause, for each communication parameter, the transmitter to gradually adjust the communication parameter using the rate of change until the communication parameter reaches the target value.
    Type: Application
    Filed: January 28, 2020
    Publication date: July 23, 2020
    Inventor: Yogesh Sethi
  • Patent number: 10681693
    Abstract: A transmitter is set to time division multiple access (TDMA) mode and allocated a first TDMA channel. In the TDMA mode, the additional TDMA channels are allocated to and deallocated from the transmitter, according a traffic demand at the transmitter, until all TDMA channels are assigned and the traffic demand reaches a threshold, whereupon the transmitter is switched to a frequency division multiple access (FDMA) mode, and assigned an FDMA channel. In response to traffic levels, the transmitter is switched to larger bandwidth FDMA channels and, optionally, to a concurrent FDMA-TDMA mode having a large bandwidth FDMA channel in addition to a number of TDMA channels. Optionally, switching the transmitter among TDMA mode, FDMA mode, and concurrent FDMA-TDMA mode is based, at least in part, on QoS, or time of day, or user statistics, or combinations thereof.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: June 9, 2020
    Assignee: Hughes Network Systems, LLC
    Inventors: Joseph Merchlinsky, Peter Johns, Satyajit Roy, Yogesh Sethi
  • Patent number: 10560941
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for adjusting communication channel bandwidth. In some implementations, a method includes determining to change a bandwidth of a wireless communication channel on which a transmitter and receiver communicate. In response, and while the transmitter and the receiver maintain data communication on the wireless communication channel, a target value and rate of change is determined for each of one or more communication parameters of the wireless communication channel. The rate of change is a rate at which the communication parameter can be changed over time while continuing to transfer data on the wireless communication channel. Data is provided to the transmitter. The data can cause, for each communication parameter, the transmitter to gradually adjust the communication parameter using the rate of change until the communication parameter reaches the target value.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: February 11, 2020
    Assignee: Hughes Network Systems, LLC
    Inventor: Yogesh Sethi
  • Patent number: 10555219
    Abstract: A method to provide dedicated bandwidth, the method including: provisioning transmitters to transmit over a satellite link; generating, for each of the transmitters, a respective transmit signal using a common codeblock asynchronous sub-carrier multiple access (A-SCMA) encoding for a respective information stream; transmitting, via the satellite link, the respective transmit signal from each of the transmitters; and varying a bandwidth rate of each of the respective transmit signals with a grant-free protocol, where the bandwidth rate of the respective transmit signals is less than or equal to a maximum system rate, the transmitting of at least two or more of the transmitters is at least partially concurrent, and each of the respective transmit signals is modulated at a common frequency over a common frequency band with a common polarization. The method reduces latency, jitter, and provides dynamic bandwidth allocation without allocation feedback.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: February 4, 2020
    Assignee: Hughes Network Systems, LLC
    Inventor: Yogesh Sethi
  • Publication number: 20190208522
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for adjusting communication channel bandwidth. In some implementations, a method includes determining to change a bandwidth of a wireless communication channel on which a transmitter and receiver communicate. In response, and while the transmitter and the receiver maintain data communication on the wireless communication channel, a target value and rate of change is determined for each of one or more communication parameters of the wireless communication channel. The rate of change is a rate at which the communication parameter can be changed over time while continuing to transfer data on the wireless communication channel. Data is provided to the transmitter. The data can cause, for each communication parameter, the transmitter to gradually adjust the communication parameter using the rate of change until the communication parameter reaches the target value.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventor: Yogesh Sethi
  • Publication number: 20180242313
    Abstract: A transmitter is set to time division multiple access (TDMA) mode and allocated a first TDMA channel. In the TDMA mode, the additional TDMA channels are allocated to and deallocated from the transmitter, according a traffic demand at the transmitter, until all TDMA channels are assigned and the traffic demand reaches a threshold, whereupon the transmitter is switched to a frequency division multiple access (FDMA) mode, and assigned an FDMA channel. In response to traffic levels, the transmitter is switched to larger bandwidth FDMA channels and, optionally, to a concurrent FDMA-TDMA mode having a large bandwidth FDMA channel in addition to a number of TDMA channels. Optionally, switching the transmitter among TDMA mode, FDMA mode, and concurrent FDMA-TDMA mode is based, at least in part, on QoS, or time of day, or user statistics, or combinations thereof.
    Type: Application
    Filed: February 21, 2017
    Publication date: August 23, 2018
    Applicant: Hughes Network Systems, LLC
    Inventors: Joseph Merchlinsky, Peter Johns, Satyajit Roy, Yogesh Sethi