Patents by Inventor Yogo Kawasaki

Yogo Kawasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8822839
    Abstract: A multi-layer printed circuit board including a core substrate, lower interlayer resin insulating layers formed on the surfaces of the core substrate, respectively, through-hole conductors formed in penetrating holes penetrating through the core substrate and the lower interlayer resin insulating layers, conductor circuits formed on the lower interlayer resin insulating layers, respectively, upper interlayer resin insulating layers formed on the conductor circuits and the lower interlayer resin insulating layers, respectively and via hole conductors formed in the upper interlayer resin insulating layers and positioned on the through-hole conductors, respectively.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: September 2, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Publication number: 20120067633
    Abstract: A multi-layer printed circuit board including a core substrate, lower interlayer resin insulating layers formed on the surfaces of the core substrate, respectively, through-hole conductors formed in penetrating holes penetrating through the core substrate and the lower interlayer resin insulating layers, conductor circuits formed on the lower interlayer resin insulating layers, respectively, upper interlayer resin insulating layers formed on the conductor circuits and the lower interlayer resin insulating layers, respectively and via hole conductors formed in the upper interlayer resin insulating layers and positioned on the through-hole conductors, respectively.
    Type: Application
    Filed: November 30, 2011
    Publication date: March 22, 2012
    Applicant: IBIDEN CO., LTD.
    Inventors: Yogo KAWASAKI, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Patent number: 8106310
    Abstract: A multi-layer printed circuit board having interlayer resin insulating layers on both sides of a core substrate, respectively, through holes provided to penetrate the core substrate and filled with resin filler, the interlayer resin insulating layers and conductor circuits provided. The resin filler contains an epoxy resin, a curing agent and 10 to 50% of inorganic particles.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: January 31, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Patent number: 7999194
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: August 16, 2011
    Assignee: IBIDEN Co., Ltd.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Patent number: 7795542
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: September 14, 2010
    Assignee: IBIDEN Co., Ltd.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Publication number: 20100006328
    Abstract: A multi-layer printed circuit board having interlayer resin insulating layers on both sides of a core substrate, respectively, through holes provided to penetrate the core substrate and filled with resin filler, the interlayer resin insulating layers and conductor circuits provided. The resin filler contains an epoxy resin, a curing agent and 10 to 50% of inorganic particles.
    Type: Application
    Filed: September 15, 2009
    Publication date: January 14, 2010
    Applicant: IBIDEN CO., LTD.
    Inventors: Yogo KAWASAKI, Hiroaki SATAKE, Yutaka IWATA, Tetsuya TANABE
  • Publication number: 20080283282
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Application
    Filed: July 24, 2008
    Publication date: November 20, 2008
    Applicant: IBIDEN CO., LTD.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Patent number: 7178234
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: February 20, 2007
    Assignee: Ibiden Co., Ltd.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Publication number: 20060191708
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Application
    Filed: January 18, 2006
    Publication date: August 31, 2006
    Applicant: IBIDEN CO., LTD.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Publication number: 20050189136
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Application
    Filed: April 15, 2005
    Publication date: September 1, 2005
    Applicant: IBIDEN CO., LTD.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
  • Patent number: 6930258
    Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: August 16, 2005
    Assignee: Ibiden Co., Ltd.
    Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe