Patents by Inventor Yohei Hasegawa
Yohei Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11941247Abstract: According to one embodiment, a storage device includes a non-volatile memory and a control unit that is electrically connected to the non-volatile memory and that is configured to control the non-volatile memory. The control unit is configured to manage a plurality of management areas obtained by logically partitioning storage area of the non-volatile memory, when a write request is received that includes data for which a valid term has been set, determine, based on the valid term, a first management area from among the management areas, write the data included in the write request to the determined first management area, and when the data written to the first management area is erased, collectively erase all data written in the first management area which includes the data.Type: GrantFiled: December 11, 2020Date of Patent: March 26, 2024Assignee: Kioxia CorporationInventors: Takeshi Ishihara, Yohei Hasegawa, Shinichi Kanno, Kohei Okuda, Masataka Goto
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Publication number: 20240088996Abstract: A communication apparatus (1) capable of easily grasping a communication quality status is provided.Type: ApplicationFiled: January 25, 2021Publication date: March 14, 2024Applicant: NEC CorporationInventor: Yohei Hasegawa
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Publication number: 20240078174Abstract: An information storage device includes a storage unit, a control unit, an allocation information storage unit, a QoS parameter storage unit, and a monitoring result storage unit. The control unit creates and manages a logical storage area using the storage area of the storage unit when a storage area allocation request is received. The allocation information storage unit stores allocation information related to logical storage areas. The QoS parameter storage unit stores quality requests expected to be satisfied for a communication for using the logical storage area. The control unit monitors the operating state and characteristics of the storage unit and the communication status, and stores the results in the monitoring result storage unit. The control unit derives internal QoS parameters to be set in the information storage device from the information stored in the allocation information storage unit, the QoS parameter storage unit, and the monitoring result storage unit.Type: ApplicationFiled: September 5, 2023Publication date: March 7, 2024Inventors: Takeshi ISHIHARA, Yohei HASEGAWA, Kenta YASUFUKU, Shohei ONISHI, Yoshiki SAITO, Junpei KIDA
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Publication number: 20240063902Abstract: Provided are a communication device, a communication controlling method, and a non-transitory computer-readable medium storing a communication controlling program that each make it possible to grasp the condition of communication quality. A communication device (1) includes acquiring means (2) configured to acquire quality information concerning a burst error that has occurred in an optical communication line. The communication device (1) includes estimating means (3) configured to estimate a first index value based on the quality information acquired by the acquiring means (2), the first index value indicating a degree of influence of the burst error on communication quality in a first communication device.Type: ApplicationFiled: October 31, 2023Publication date: February 22, 2024Applicant: NEC CorporationInventor: Yohei HASEGAWA
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Patent number: 11848700Abstract: Provided are a communication device, a communication controlling method, and a non-transitory computer-readable medium storing a communication controlling program that each make it possible to grasp the condition of communication quality. A communication device (1) includes acquiring means (2) configured to acquire quality information concerning a burst error that has occurred in an optical communication line. The communication device (1) includes estimating means (3) configured to estimate a first index value based on the quality information acquired by the acquiring means (2), the first index value indicating a degree of influence of the burst error on communication quality in a first communication device.Type: GrantFiled: March 27, 2020Date of Patent: December 19, 2023Assignee: NEC CORPORATIONInventor: Yohei Hasegawa
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Patent number: 11849348Abstract: A communication system includes: a transmitting-side terminal; a transmitting-side communication apparatus configured to receive data transmitted by the transmitting-side terminal and transmit the received data by radio transmission to a receiving-side communication apparatus; and the receiving-side communication apparatus configured to transmit the data received by radio transmission from the transmitting-side communication apparatus to a receiving-side terminal. The transmitting-side terminal includes a control unit configured to control a transmission speed of the data addressed to the receiving-side terminal based on a first error rate that is an error rate of radio transmission from the transmitting-side communication apparatus to the receiving-side communication apparatus and a second error rate that is an error rate of transmission from the transmitting-side terminal to the receiving-side terminal.Type: GrantFiled: February 5, 2020Date of Patent: December 19, 2023Assignee: NEC CORPORATIONInventors: Yohei Hasegawa, Toshiharu Ito
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Publication number: 20230379052Abstract: A switching device includes an optical communication unit configured to receive an optical communication signal; and a control unit configured to switch a path for the optical communication unit to receive an optical communication signal based on at least one of reception power of the optical communication signal received by the optical communication unit, an error rate of a synchronous signal therefor, an error rate after signal demodulation thereof, an error rate after error correction decoding thereof, and an SN (Signal-to-Noise) ratio of the path for the optical communication signal.Type: ApplicationFiled: March 13, 2023Publication date: November 23, 2023Applicant: NRC CorporationInventor: Yohei HASEGAWA
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Publication number: 20230205460Abstract: According to one embodiment, a storage system includes a host computer and a storage device. The host computer includes a file system which has a structure for managing a file by using a management structure and metadata that manage correspondence between stored data and the storage position of the data on the file system, and bitmap information for identifying a unit area that holds valid data and other unit areas. The host computer manages the management structure and the metadata, and manages the bitmap information. The storage device manages information for identifying a unit area that holds valid data in the storage device and other areas by using the bitmap information used for management of the file system shared with the host computer.Type: ApplicationFiled: September 6, 2022Publication date: June 29, 2023Inventors: Takeshi ISHIHARA, Hidekazu TADOKORO, Yohei HASEGAWA
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Publication number: 20230098774Abstract: Provided are a communication device, a communication controlling method, and a non-transitory computer-readable medium storing a communication controlling program that each make it possible to grasp the condition of communication quality. A communication device (1) includes acquiring means (2) configured to acquire quality information concerning a burst error that has occurred in an optical communication line. The communication device (1) includes estimating means (3) configured to estimate a first index value based on the quality information acquired by the acquiring means (2), the first index value indicating a degree of influence of the burst error on communication quality in a first communication device.Type: ApplicationFiled: March 27, 2020Publication date: March 30, 2023Applicant: NEC CorporationInventor: Yohei HASEGAWA
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Patent number: 11496869Abstract: A sever transmits an acknowledgement in response to data transmission from first and second terminals, respectively, among a plurality of terminals. The server controls the first and second terminals so that the first and second terminals open a reception slot at substantially the same timing. The server transmits a collective acknowledgement shared by the first and second terminals during both of the first and second terminals open the reception slot.Type: GrantFiled: March 28, 2019Date of Patent: November 8, 2022Assignee: NEC CORPORATIONInventor: Yohei Hasegawa
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Publication number: 20220329319Abstract: Provided is a communication device that can deliver an improvement in the communication capacity of communication infrastructure with the quality of communication taken into consideration. A communication device includes an acquiring unit configured to acquire quality information of a communication line extending from a first communication device to a second communication device and including an optical communication line, an estimating unit configured to estimate the quality of communication of the second communication device and determine the required quality of communication of the second communication device based on the quality information, and a controlling unit configured to perform control on communication channels in the optical communication line so that the quality of communication satisfies the required quality of communication.Type: ApplicationFiled: September 20, 2019Publication date: October 13, 2022Applicant: NEC CorporationInventors: Yohei HASEGAWA, Hidemi NOGUCHI, Shigeyuki YANAGIMACHI
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Publication number: 20220256398Abstract: A communication system includes: a transmitting-side terminal; a transmitting-side communication apparatus configured to receive data transmitted by the transmitting-side terminal and transmit the received data by radio transmission to a receiving-side communication apparatus; and the receiving-side communication apparatus configured to transmit the data received by radio transmission from the transmitting-side communication apparatus to a receiving-side terminal. The transmitting-side terminal includes a control unit configured to control a transmission speed of the data addressed to the receiving-side terminal based on a first error rate that is an error rate of radio transmission from the transmitting-side communication apparatus to the receiving-side communication apparatus and a second error rate that is an error rate of transmission from the transmitting-side terminal to the receiving-side terminal.Type: ApplicationFiled: February 5, 2020Publication date: August 11, 2022Applicant: NEC CorporationInventors: Yohei HASEGAWA, Toshiharu ITO
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Patent number: 11405148Abstract: A receive terminal setting a non-delivery determination time for determining that a next data packet is not delivered after transmitting an acknowledgement (ACK) packet for a received data packet; when the next data packet is not delivered within the non-delivery determination time, the receive terminal repeatedly transmits a retransmission request (RACK) packet prompting the transmission of the next data packet; a transmit terminal specifies a non-delivered data packet using time difference information based on the time-of-day information of the received ACK packet and RACK packet and retransmits the specified data packet to the receive terminal; the time-of-day information here is a time stamp added by the receive terminal to each of the ACK packet and RACK packet when transmitted, or a time stamp added by the transmit terminal to each of the ACK packet and RACK packet when received.Type: GrantFiled: February 20, 2018Date of Patent: August 2, 2022Assignee: NEC CORPORATIONInventor: Yohei Hasegawa
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Patent number: 11372560Abstract: A memory system includes a plurality of physical memories and a memory controller. The memory controller is configured to configure one or more logical memories used by one or more programs, respectively, to which areas of the plurality of physical memories are allocated. The memory controller is configured to calculate first data indicating a response performance of the plurality of physical memories, calculate second data indicating a degree of influence of waiting for access to the one or more logical memories, the degree of influence being on a processing performance of the one or more programs, and control allocation of the areas of the plurality of physical memories to the one or more logical memories on the basis of the first data and the second data.Type: GrantFiled: August 31, 2020Date of Patent: June 28, 2022Assignee: KIOXIA CORPORATIONInventors: Yohei Hasegawa, Takeshi Ishihara
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Patent number: 11269559Abstract: According to one embodiment, a data processing device including a user space including a user space thread including a plurality of coroutines and a file system. The file system is configured to: allocate a plurality of processes generated by an application to the plurality of coroutines; check the plurality of coroutines in order; when a first process included in the plurality of processes is allocated to a first coroutine included in the plurality of coroutines, write a first IO request based on the first process in a submission queue; and when the submission queue is filled, or when checking the plurality of coroutines is finished, transmit the first IO request written in the submission queue to a storage device.Type: GrantFiled: September 11, 2020Date of Patent: March 8, 2022Assignee: Kioxia CorporationInventors: Hidekazu Tadokoro, Takeshi Ishihara, Yohei Hasegawa
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Publication number: 20210294528Abstract: According to one embodiment, a data processing device including a user space including a user space thread including a plurality of coroutines and a file system. The file system is configured to: allocate a plurality of processes generated by an application to the plurality of coroutines; check the plurality of coroutines in order; when a first process included in the plurality of processes is allocated to a first coroutine included in the plurality of coroutines, write a first IO request based on the first process in a submission queue; and when the submission queue is filled, or when checking the plurality of coroutines is finished, transmit the first IO request written in the submission queue to a storage device.Type: ApplicationFiled: September 11, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Hidekazu TADOKORO, Takeshi ISHIHARA, Yohei HASEGAWA
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Publication number: 20210278972Abstract: According to one embodiment, a storage device includes a non-volatile memory and a control unit that is electrically connected to the non-volatile memory and that is configured to control the non-volatile memory. The control unit is configured to manage a plurality of management areas obtained by logically partitioning storage area of the non-volatile memory, when a write request is received that includes data for which a valid term has been set, determine, based on the valid term, a first management area from among the management areas, write the data included in the write request to the determined first management area, and when the data written to the first management area is erased, collectively erase all data written in the first management area which includes the data.Type: ApplicationFiled: December 11, 2020Publication date: September 9, 2021Applicant: Kioxia CorporationInventors: Takeshi ISHIHARA, Yohei HASEGAWA, Shinichi KANNO, Kohei OKUDA, Masataka GOTO
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Publication number: 20210271400Abstract: A memory system includes a plurality of physical memories and a memory controller. The memory controller is configured to configure one or more logical memories used by one or more programs, respectively, to which areas of the plurality of physical memories are allocated. The memory controller is configured to calculate first data indicating a response performance of the plurality of physical memories, calculate second data indicating a degree of influence of waiting for access to the one or more logical memories, the degree of influence being on a processing performance of the one or more programs, and control allocation of the areas of the plurality of physical memories to the one or more logical memories on the basis of the first data and the second data.Type: ApplicationFiled: August 31, 2020Publication date: September 2, 2021Applicant: Kioxia CorporationInventors: Yohei HASEGAWA, Takeshi ISHIHARA
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Patent number: 11057843Abstract: A communication control device 30 that determines second communication processing that is communication processing that can be executed in parallel with first communication processing that is communication processing that is executed between a transmission terminal and a reception terminal. The communication control device including: a transmission power determination unit 31 that determines conditions for the transmission power of a signal that would not impede the first communication processing, even if a signal that is transmitted by means of the second communication processing is received by the reception terminal; and a destination determination unit 32 that determines a destination for the second communication processing from among terminals at which a signal that is transmitted at transmission power that satisfies the determined conditions could arrive.Type: GrantFiled: July 11, 2018Date of Patent: July 6, 2021Assignee: NEC CORPORATIONInventor: Yohei Hasegawa
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Patent number: 10922240Abstract: According to one embodiment, a memory system includes a cache configured to cache a part of a multi-level mapping table for logical-to-physical address translation, and a controller. The multi-level mapping table includes a plurality of hierarchical tables corresponding to a plurality of hierarchical levels. The table of each hierarchical level includes a plurality of address translation data portions. The controller sets a priority for each of the hierarchical level based on a degree of bias of reference for each of the hierarchical level, and preferentially caches each of the address translation data portions of a hierarchical level with a high priority into the cache, over each of the address translation data portions of a hierarchical level with low priority.Type: GrantFiled: March 11, 2019Date of Patent: February 16, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shohei Onishi, Yoshiki Saito, Yohei Hasegawa, Konosuke Watanabe