Abstract: A display device includes an active-matrix-type display panel including video signal lines, and a video signal lines driving circuit which supplies display data to the video signal lines, and a display control circuit receiving video data from an external signal source, and outputting the display data to the video signal lines driving circuit. The display control circuit receives the video data of one frame in synchronism with a frame frequency, and output the display data of one field in synchronism with a field frequency at two times a speed of the field frequency. Wherein when one pixel data of the video data of a first frame has a lower luminance than a given value, the display control circuit outputs a first video data in a first field and a second video data which displays black in a second field.

Abstract: The states of various kinds of control signals, such as a horizontal synchronizing signal, a vertical synchronizing signal, a display timing signal, etc., that are supplied from an external signal source to a display device, are inspected. In the states of various kinds of control signals supplied from the external signal source HOST to the display device DSP, (1) the vertical synchronizing signal (VSYNC) is converted into a display signal of red (R), (2) the horizontal synchronizing signal (HSYNC) is converted into a display signal of green (G), and (3) the display timing signal is converted into a display signal of blue (B) by a control signal inspecting circuit. The states are displayed in color and brightness on the screen of the display device DSP, so that these states can be simply visually inspected.

Abstract: In a display device, input display data processed by an input processing circuit is stored in a frame memory as first video data. Next-inputted video data is stored in another frame memory as second video data. The stored first video data is read out as video signals of a first field in response to a double-speed clock signal and is supplied to respective drain drivers. A comparison circuit compares second video data and first video data in the frame memory for each pixel. An output data processing circuit is controlled based on the comparison result. When second video data is darker than first video data, black display data is supplied to respective drain drivers as display data of the second field, while when second video data is brighter than first video data, white display data is supplied to respective drain drivers as display data of the second field.

Abstract: In a display device, input display data processed by an input processing circuit is stored in a frame memory as first video data. Next-inputted video data is stored in another frame memory as second video data. The stored first video data is read out as video signals of a first field in response to a double-speed clock signal and is supplied to respective drain drivers. A comparison circuit compares second video data and first video data in the frame memory for each pixel. An output data processing circuit is controlled based on the comparison result. When second video data is darker than first video data, black display data is supplied to respective drain drivers as display data of the second field, while when the second video data is brighter than first video data, white display data is supplied to respective drain drivers as display data of the second field.

Abstract: The states of various kinds of control signals, such as a horizontal synchronizing signal, a vertical synchronizing signal, a display timing signal, etc., that are supplied from an external signal source to a display device, are inspected. In the states of various kinds of control signals supplied from the external signal source HOST to the display device DSP, (1) the vertical synchronizing signal (VSYNC) is converted into a display signal of red (R), (2) the horizontal synchronizing signal (HSYNC) is converted into a display signal of green (G), and (3) the display timing signal is converted into a display signal of blue (B) by a control signal inspecting circuit. The states are displayed in color and brightness on the screen of the display device DSP, so that these states can be simply visually inspected.

Abstract: For preventing a screen of a liquid crystal display device from displaying doubly, there is provided a counter for counting a pixels-number N of the display data inputted thereto during one horizontal period, a lateral pixel number generating circuit for generating a capacity number M of pixels in a lateral direction of the screen, a subtracting circuit for calculating a difference of (N−M), a pixels-number conversion circuit for converting the pixels-number N to the number M (M>N), and a clock frequency multiplying circuit for multiplying a frequency CL of the external clock signal supplied thereto by a natural number A being equal to or greater than 2 for an interface circuit thereof, and alters pixel data transferring manner to drain drivers thereof and a frequency of a clock signal transferred to the drain drivers in accordance with the result of the division M/N.

Abstract: In a liquid crystal display device comprising a liquid crystal display element, a plurality of driving circuits being provided for the liquid crystal display element at least one of which has at least one output terminal being not connected to any signal lines of the liquid crystal element, and a display control device transmitting display data including that corresponding to the at least one output terminal (i.e. an ineffective display datum) to the plurality of driving circuits, the present invention transmits another datum being transmitted either prior to or subsequently to the ineffective display datum which corresponds to another output line being connected to one of signal lines of the liquid crystal element to the at least one of the plurality of driving circuits instead of the ineffective display datum and reduces transmission frequency of a bus line of the liquid crystal display device.

Abstract: A liquid crystal device in which a peripheral circuit board positioned in the outer periphery of a seal port is recessed to avoid the projection of the seal port and in which a fluorescent tube has its two lamp cables arranged around the four sides of a crystal display element, so that the substrate at the seal port side and the lamp cable of a side light type back light can be packaged in compact.

Abstract: A liquid crystal display device. The liquid crystal display device has a peripheral circuit including a liquid crystal display having drive ICs COG-packaged on a transparent substrate, and a foldable multi-layered flexible substrate having two or more conductor layers, so that the compact packaging can be realized to reduce EMI noise and the number of parts. The liquid crystal display device may also include a display controller having two or more display control integrated circuit elements packaged therein, and drive ICs mounted by a chip-on-glass packaging on two sides of a liquid crystal display panel, usually, on the longer sides, so that the display controller excellent in the temperature resistance and advantageous in compact and a video signal line driving circuit board are uniformly arranged at the upper and lower sides of a screen. As a result, the vertical positioning of the screen can be made proper to take an advantage in the compact packaging.