Patents by Inventor Yoichi Kitamura
Yoichi Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11211710Abstract: In an array antenna apparatus, a first height of top faces of plurality of antenna elements is greater than or equal to a second height of a first top of a first electronic component relative to a first primary surface. The first electronic component is the tallest among one or more electronic components mounted on fourth primary surfaces of one or more first external circuit boards. A third height of a second primary surface is greater than a fourth height of fourth primary surfaces. Accordingly, the array antenna apparatus has good antenna characteristics.Type: GrantFiled: March 8, 2018Date of Patent: December 28, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoichi Kitamura, Takumi Nagamine, Takayuki Nakao, Kiyoshi Ishida, Tetsu Owada
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Patent number: 10863625Abstract: A flexible printed circuit board includes: a base material including a principal face; at least one first wiring pattern disposed on the principal face of the base material and extending along a first direction; and a first member and a second member disposed on the first wiring pattern so as to be spaced from each other in the first direction. In the first direction, the first member and the second member divide the flexible printed circuit board into: a first region located opposite to the second member with respect to the first member in the first direction, a second region located between the first member and the second member, a third region located opposite to the first member with respect to the second member, a fourth region in which the first member is disposed, and a fifth region in which the second member is disposed.Type: GrantFiled: April 19, 2018Date of Patent: December 8, 2020Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Takumi Nagamine, Yoichi Kitamura
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Publication number: 20200235478Abstract: In an array antenna apparatus, a first height of top faces of plurality of antenna elements is greater than or equal to a second height of a first top of a first electronic component relative to a first primary surface. The first electronic component is the tallest among one or more electronic components mounted on fourth primary surfaces of one or more first external circuit boards. A third height of a second primary surface is greater than a fourth height of fourth primary surfaces. Accordingly, the array antenna apparatus has good antenna characteristics.Type: ApplicationFiled: March 8, 2018Publication date: July 23, 2020Applicant: Mitsubishi Electric CorporationInventors: Yoichi KITAMURA, Takumi NAGAMINE, Takayuki NAKAO, Kiyoshi ISHIDA, Tetsu OWADA
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Patent number: 10714838Abstract: An array antenna apparatus includes: a wiring substrate having a plurality of fed patch antennas and a plurality of active element circuits electrically connected to the plurality of fed patch antennas, respectively; and a plurality of antenna substrates each having a parasitic patch antenna. The plurality of antenna substrates are joined onto one wiring substrate. Thereby, it becomes possible to provide an array antenna apparatus that can be reduced in size and has excellent antenna characteristics.Type: GrantFiled: October 13, 2015Date of Patent: July 14, 2020Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoichi Kitamura, Takashi Maruyama, Takeshi Nakazato
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Publication number: 20200146150Abstract: A flexible printed circuit board includes: a base material including a principal face; at least one first wiring pattern disposed on the principal face of the base material and extending along a first direction; and a first member and a second member disposed on the first wiring pattern so as to be spaced from each other in the first direction. In the first direction, the first member and the second member divide the flexible printed circuit board into: a first region located opposite to the second member with respect to the first member in the first direction, a second region located between the first member and the second member, a third region located opposite to the first member with respect to the second member, a fourth region in which the first member is disposed, and a fifth region in which the second member is disposed.Type: ApplicationFiled: April 19, 2018Publication date: May 7, 2020Applicant: Mitsubishi Electric CorporationInventors: Takumi NAGAMINE, Yoichi KITAMURA
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Publication number: 20190139702Abstract: An irreversible circuit element that can reduce manufacturing costs by preventing faults that lead to product defects includes a magnetic body, a magnetic body securing casing, and a magnet. The magnetic body securing casing is arranged so as to surround the magnetic body. The magnet is arranged on one side of the magnetic body. The magnetic body securing casing includes a first electrode on one casing main surface arranged on the one side, a second electrode on the other casing main surface arranged on the other side opposite to the one side, and a through-conductor that passes through the magnetic body securing casing and electrically connects the first electrode to the second electrode. The first electrode is connected to a first wiring arranged on the one side of the magnetic body.Type: ApplicationFiled: November 4, 2016Publication date: May 9, 2019Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoichi KITAMURA, Tetsuya UEDA, Hironobu SHIBATA, Yukinobu TARUI
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Publication number: 20170229784Abstract: An array antenna apparatus includes: a wiring substrate having a plurality of fed patch antennas and a plurality of active element circuits electrically connected to the plurality of fed patch antennas, respectively; and a plurality of antenna substrates each having a parasitic patch antenna. The plurality of antenna substrates are joined onto one wiring substrate. Thereby, it becomes possible to provide an array antenna apparatus that can be reduced in size and has excellent antenna characteristics.Type: ApplicationFiled: October 13, 2015Publication date: August 10, 2017Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoichi KITAMURA, Takashi MARUYAMA, Takeshi NAKAZATO
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Patent number: 8912453Abstract: An electronic component package includes a circuit board which has a mounting surface that does not show wettability for fluxless solder and on which a semiconductor element is mounted, a soldering pattern that shows wettability for the fluxless solder and is formed to surround an area on which the semiconductor element is mounted, a lid that has a shape such that a cavity is formed between the lid and the circuit board, a bonding surface to the soldering pattern is formed in a ring shape, and does not show wettability for the fluxless solder, a solder bonded part that is formed by heating a solder precoat formed of the fluxless solder on a bonding surface of the lid, and a ventilation hole that is formed by providing a bonding surface of the lid exposed in a discontinuous part of the solder precoat after the solder bonded part is formed.Type: GrantFiled: December 13, 2010Date of Patent: December 16, 2014Assignee: Mitsubishi Electric CorporationInventors: Minoru Hashimoto, Yoichi Kitamura, Yosuke Kondo, Kenichiro Ichikawa
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Patent number: 8548416Abstract: A two-terminal semiconductor device is formed on a semiconductor substrate. Two wiring patterns are respectively connected to terminals of the semiconductor device, and two electrode pads are respectively connected to the wiring patterns for connecting a signal input/output circuit formed on a separate substrate. Two parallel wiring patterns are respectively connected to the wiring patterns, and two reactance-circuit connection electrode pads are respectively connected to the parallel wiring patterns for electrically connecting a reactance circuit formed on the separate substrate separately from the signal input/output circuit.Type: GrantFiled: November 15, 2007Date of Patent: October 1, 2013Assignee: Mitsubishi Electric CorporationInventors: Takuya Suzuki, Kenji Kawakami, Ko Kanaya, Yoichi Kitamura
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Publication number: 20120273264Abstract: An electronic component package includes a circuit board which has a mounting surface that does not show wettability for fluxless solder and on which a semiconductor element is mounted, a soldering pattern that shows wettability for the fluxless solder and is formed to surround an area on which the semiconductor element is mounted, a lid that has a shape such that a cavity is formed between the lid and the circuit board, a bonding surface to the soldering pattern is formed in a ring shape, and does not show wettability for the fluxless solder, a solder bonded part that is formed by heating a solder precoat formed of the fluxless solder on a bonding surface of the lid, and a ventilation hole that is formed by providing a bonding surface of the lid exposed in a discontinuous part of the solder precoat after the solder bonded part is formed.Type: ApplicationFiled: December 13, 2010Publication date: November 1, 2012Applicant: Mitsubishi Electric CorporationInventors: Minoru Hashimoto, Yoichi Kitamura, Yosuke Kondo, Kenichiro Ichikawa
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Patent number: 8240037Abstract: A process for producing a circuit module including, carried out in this order, preparing a ceramic carrier substrate having ceramic substrate pads for mounting electronic parts, forming solder paste layers on the ceramic substrate pads, forming precoated solder layers by heating the ceramic carrier substrate having the solder paste layers on the ceramic substrate pads to melt the solder paste layers, and then cooling for solidifying the solder, preliminarily fixing stepped lid having protrusions adjacent to a cavity and dents adjacent to the cavity with the protrusions intervening therebetween to the precoated solder layers of the ceramic carrier substrate and joining the stepped lid to the ceramic carrier substrate with solder by placing the ceramic carrier substrate having the stepped lid preliminarily fixed to the precoated solder layers in a reflow furnace.Type: GrantFiled: November 13, 2009Date of Patent: August 14, 2012Assignee: Mitsubishi Electric CorporationInventors: Yoichi Kitamura, Minoru Hashimoto, Tatsuya Kaneko
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Patent number: 8229387Abstract: Provided is an even harmonic mixer which is reduced in cost and size. The even harmonic mixer includes: a transducer in which a conductor of a microstrip line is connected to a ground plane of a waveguide, for transducing an RF signal transmitted in a waveguide mode into a transmission mode of the microstrip line; an anti-parallel diode pair which is cascade-connected to a microstrip line side of the transducer, and formed on a semiconductor substrate; a branching circuit for branching an LO signal and an IF signal; an open-end stub which is disposed between the transducer and the anti-parallel diode pair, and has a line length of about ½ wavelength at an RF signal frequency; and an open-end stub which is disposed between the anti-parallel diode pair and the branching circuit, and has a line length of about ¼ wavelength at the RF signal frequency.Type: GrantFiled: April 25, 2007Date of Patent: July 24, 2012Assignee: Mitsubishi Electric CorporationInventors: Kenji Kawakami, Takuya Suzuki, Ko Kanaya, Yoichi Kitamura
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Publication number: 20100315177Abstract: Provided is an even harmonic mixer which is reduced in cost and size. The even harmonic mixer includes: a transducer in which a conductor of a microstrip line is connected to a ground plane of a waveguide, for transducing an RF signal transmitted in a waveguide mode into a transmission mode of the microstrip line; an anti-parallel diode pair which is cascade-connected to a microstrip line side of the transducer, and formed on a semiconductor substrate; a branching circuit for branching an LO signal and an IF signal; an open-end stub which is disposed between the transducer and the anti-parallel diode pair, and has a line length of about ½ wavelength at an RF signal frequency; and an open-end stub which is disposed between the anti-parallel diode pair and the branching circuit, and has a line length of about ¼ wavelength at the RF signal frequency.Type: ApplicationFiled: April 25, 2007Publication date: December 16, 2010Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Kenji Kawakami, Takuya Suzuki, Ko Kanaya, Yoichi Kitamura
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Patent number: 7763315Abstract: Disclosed are a coating material for metal wherein a thin coating film without pinholes having excellent corrosion resistance, retort resistance, impact resistance, processing resistance, abrasion resistance, adhesiveness to a metal, flavor preservability for contents etc can be formed when applying on a metal plate or a metallic container, and a metallic container on which the coating material is applied. The coating material for metal includes thermoplastic resin particles having an average primary particle size of 10 to 800 nm obtained by cooling a solution of the thermoplastic resin. A process for preparing the coating material for metal comprises steps of (a) obtaining a solution wherein a thermoplastic resin is dissolved into an organic solvent, (b) obtaining a dispersion of particles of the thermoplastic resin having an average primary particle size of 10 to 800 nm by cooling the solution, (c) separating particles from the dispersion and (d) dispersing the separated particles in a solvent.Type: GrantFiled: August 20, 2004Date of Patent: July 27, 2010Assignee: Sakuranomiya Chemical Co., LtdInventors: Masao Yamazaki, Yoshiyuki Asai, Yoichi Kitamura, Tsuyoshi Hasegawa
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Patent number: 7738263Abstract: A circuit module containing a ceramic carrier substrate to carry electronic parts, ceramic substrate pads provided on a surface of the ceramic carrier substrate, and a lid having a cavity and a bottom surface joined to the ceramic substrate pads with solder, the lid being a stepped lid having protrusions adjacent to the cavity, and dents adjacent to the cavity with the protrusions intervening therebetween, the protrusions being in contact with the ceramic carrier substrate with a prescribed distance to the ceramic substrate pads, and the dents being joined to the ceramic substrate pads with solder.Type: GrantFiled: January 17, 2008Date of Patent: June 15, 2010Assignee: Mitsubishi Electric CorporationInventors: Yoichi Kitamura, Minoru Hashimoto, Tatsuya Kaneko
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Publication number: 20100126008Abstract: A circuit module containing a ceramic carrier substrate to carry electronic parts, ceramic substrate pads provided on a surface of the ceramic carrier substrate, and a lid having a cavity and a bottom surface joined to the ceramic substrate pads with solder, the lid being a stepped lid having protrusions adjacent to the cavity, and dents adjacent to the cavity with the protrusions intervening therebetween, the protrusions being in contact with the ceramic carrier substrate with a prescribed distance to the ceramic substrate pads, and the dents being joined to the ceramic substrate pads with solder.Type: ApplicationFiled: November 13, 2009Publication date: May 27, 2010Applicant: Mitsubishi Electric CorporationInventors: Yoichi Kitamura, Minoru Hashimoto, Tatsuya Kaneko
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Publication number: 20100117711Abstract: A two-terminal semiconductor device is formed on a semiconductor substrate. Two wiring patterns are respectively connected to terminals of the semiconductor device, and two electrode pads are respectively connected to the wiring patterns for connecting a signal input/output circuit formed on a separate substrate. Two parallel wiring patterns are respectively connected to the wiring patterns, and two reactance-circuit connection electrode pads are respectively connected to the parallel wiring patterns for electrically connecting a reactance circuit formed on the separate substrate separately from the signal input/output circuit.Type: ApplicationFiled: November 15, 2007Publication date: May 13, 2010Applicant: Mitsubishi Electric CorporationInventors: Takuya Suzuki, Kenji Kawakami, Ko Kanaya, Yoichi Kitamura
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Publication number: 20080174983Abstract: A circuit module containing a ceramic carrier substrate to carry electronic parts, ceramic substrate pads provided on a surface of the ceramic carrier substrate, and a lid having a cavity and a bottom surface joined to the ceramic substrate pads with solder, the lid being a stepped lid having protrusions adjacent to the cavity, and dents adjacent to the cavity with the protrusions intervening therebetween, the protrusions being in contact with the ceramic carrier substrate with a prescribed distance to the ceramic substrate pads, and the dents being joined to the ceramic substrate pads with solder.Type: ApplicationFiled: January 17, 2008Publication date: July 24, 2008Applicant: Mitsubishi Electric CorporationInventors: Yoichi Kitamura, Minoru Hashimoto, Tatsuya Kaneko
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Patent number: D719472Type: GrantFiled: July 12, 2013Date of Patent: December 16, 2014Assignee: Rion Co., Ltd.Inventors: Daisuke Sakaue, Naru Sato, Yoichi Kitamura
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Patent number: D942201Type: GrantFiled: February 5, 2020Date of Patent: February 1, 2022Assignee: ZOJIRUSHI CORPORATIONInventor: Yoichi Kitamura