Abstract: Out of a plurality of transistors, in a power switch which controls, for each logic block, a supply and an interruption of power with respect to the each logic block, each having a gate electrode connected to a well via a contact electrode, and a body region connected to a connection portion of the well with the contact electrode via a well resistor under an element isolation insulating film, and controlling a threshold voltage by changing an electric potential applied to the body region in accordance with a signal of the gate electrode, a plurality of first transistors and a plurality of second transistors which are different from the plurality of first transistors are made to have different delay characteristics from each other between the respective connection portions of the well with the contact electrodes and the respective body regions.

Abstract: Out of a plurality of transistors, in a power switch which controls, for each logic block, a supply and an interruption of power with respect to the each logic block, each having a gate electrode connected to a well via a contact electrode, and a body region connected to a connection portion of the well with the contact electrode via a well resistor under an element isolation insulating film, and controlling a threshold voltage by changing an electric potential applied to the body region in accordance with a signal of the gate electrode, a plurality of first transistors and a plurality of second transistors which are different from the plurality of first transistors are made to have different delay characteristics from each other between the respective connection portions of the well with the contact electrodes and the respective body regions.

Abstract: A first well of a first conductivity type is formed in a partial region of the surface layer of a semiconductor substrate. A MOS transistor is formed in the first well. The MOS transistor has a gate insulating film, a gate electrode, and first and second impurity diffusion regions of a second conductivity type on both sides of the gate electrode. A high leak current structure is formed which makes a leak current density when a reverse bias voltage is applied across the first impurity diffusion region and first well become higher than a leak current density when the same reverse bias voltage is applied across the second impurity diffusion region and first well.