Abstract: A semiconductor device includes an insulation base material, a wiring layer, a via, and a semiconductor element. The insulation base material includes an insulating layer including an adhesive agent layer formed on one surface of the insulating layer. The wiring layer is formed on the one surface of the adhesive agent layer. The via is separately formed from the wiring layer and penetrates through the insulating layer and the adhesive agent layer, to be connected with the wiring layer. The semiconductor element is connected, via a sintered material, with another end of the via on an opposite side of one end of the via, the one end being connected with the wiring layer, on another surface of the insulating layer.

Abstract: A semiconductor device includes a semiconductor element, a first organic substrate covering an edge of an electrode pad of the semiconductor element, a first wiring layer arranged on an upper surface of the first organic substrate, and a conductive layer formed on a lower surface of the semiconductor element. The semiconductor device further includes a second organic substrate covering an edge of the conductive layer, and an encapsulation resin encapsulating the semiconductor element between the first and second organic substrates. The conductive layer includes an electrode pad. The first organic substrate includes a first substrate body and a first adhesive layer formed on the first substrate body and adhered to the upper surface of the semiconductor element. The second organic substrate includes a second substrate body and a second adhesive layer formed on the second substrate body and adhered to a lower surface of the conductive layer.

Abstract: A semiconductor device includes a wiring substrate and a semiconductor element. The wiring substrate includes an insulating layer and a wiring layer. The semiconductor element includes a first electrode and is fixed to the wiring substrate with the first electrode facing the wiring substrate. The wiring layer includes a first wiring pattern on a surface of the insulating layer on the opposite side from the semiconductor element. The wiring layer further includes a first via interconnect. The first via interconnect is formed of a sintering material of metal and fills in a first through hole piercing through the first wiring pattern and the insulating layer to expose the first electrode. The first via interconnect electrically connects the first wiring pattern and the first electrode.

Abstract: An electronic apparatus includes a lead frame, a wiring board, and a sealing resin. The wiring board mounts an electronic component boded to the lead frame. The sealing resin seals the lead frame, the electronic component, and the wiring board. The lead frame includes a first surface bonded to the electronic component and a second surface located opposite to the first surface and exposed from the sealing resin. The wiring board includes an insulating base material, a wiring layer formed on a first surface of the insulating base material, and an adhesive layer laminated on a second surface of the insulating base material on an opposite side of the first surface and including a second surface to which the electronic component is bonded. The first surface of the insulating base material and the second surface of the adhesive layer are covered by the sealing resin.

Abstract: A semiconductor device includes a laminate including a semiconductor element, an insulating substrate on a first surface of the semiconductor element, an interconnect on the insulating substrate, and an interconnect member on a second surface of the semiconductor element. The interconnect is electrically connected to a first electrode in the first surface of the semiconductor element through a through hole in the insulating substrate. The interconnect member is electrically connected to a second electrode in the second surface of the semiconductor element. The semiconductor device further includes first and second elastic terminals holding the laminate therebetween. The first terminal includes a bulge that engages with a depression in the interconnect. The second terminal contacts the interconnect member. The semiconductor device further includes a fixing member fixing the first terminal and the second terminal while electrically isolating the first terminal and the second terminal from each other.

Abstract: A semiconductor device includes a lower substrate, a first wiring pattern disposed on the lower substrate with a current input terminal, a semiconductor element mounted on the lower substrate with a first electrode electrically connected to the first wiring pattern and a second electrode opposed to the first wiring pattern, an upper substrate disposed on the second electrode, via wirings extending through the upper substrate and connected to the second electrode, a second wiring pattern disposed on the upper substrate and electrically connected to the second electrode via the via wirings, and a current output terminal. The second wiring pattern is electrically connected to the current output terminal and extends from the second electrode toward the current output terminal in plan view. Among the via wirings, first via wirings closest to the current output terminal are larger than second via wirings adjacent to the first via wirings in plan view.

Abstract: A semiconductor device includes a film substrate, an adhesive on a first surface of the film substrate, an electronic component on the adhesive, a wiring layer on a second surface of the film substrate opposite from the first surface, and a reinforcement member in an area around the electronic component on the adhesive. The wiring layer is connected to the electronic component through a via hole piercing through the film substrate and the adhesive. The reinforcement member has a thickness smaller than the thickness of the electronic component.

Abstract: An electronic-component-embedded substrate includes a base having flexibility and cavities formed therethrough, electronic components disposed in the cavities, respectively, and interconnects disposed on the base and connected to the electronic components, wherein the interconnects include a metal foil having openings that abut the electronic components, and include a plating layer disposed on the metal foil and connected to the electronic components through the openings.

Abstract: A semiconductor device includes a film substrate, an adhesive on a first surface of the film substrate, an electronic component on the adhesive, a wiring layer on a second surface of the film substrate opposite from the first surface, and a reinforcement member in an area around the electronic component on the adhesive. The wiring layer is connected to the electronic component through a via hole piercing through the film substrate and the adhesive. The reinforcement member has a thickness smaller than the thickness of the electronic component.

Abstract: An electronic-component-embedded substrate includes a base having flexibility and cavities formed therethrough, electronic components disposed in the cavities, respectively, and interconnects disposed on the base and connected to the electronic components, wherein the interconnects include a metal foil having openings that abut the electronic components, and include a plating layer disposed on the metal foil and connected to the electronic components through the openings.

Abstract: A wiring substrate includes a first wiring layer, an insulation layer arranged on the first wiring layer and formed of a photosensitive resin, a via hole formed in the insulation layer and reaching the first wiring layer, and a second wiring layer formed in the via hole and on the insulation layer and connected to the first wiring layer. A surface of the first wiring layer in the via hole is formed as a roughened surface.

Abstract: A wiring substrate includes a first wiring layer, an insulation layer arranged on the first wiring layer and formed of a photosensitive resin, a via hole formed in the insulation layer and reaching the first wiring layer, and a second wiring layer formed in the via hole and on the insulation layer and connected to the first wiring layer. A surface of the first wiring layer in the via hole is formed as a roughened surface.