Patents by Inventor Yoichi Shiota

Yoichi Shiota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031062
    Abstract: According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 ??m2. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: June 8, 2021
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Yoichi Shiota, Takayuki Nozaki, Shinji Yuasa
  • Publication number: 20200035283
    Abstract: According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 ??m2. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation.
    Type: Application
    Filed: April 4, 2018
    Publication date: January 30, 2020
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Yoichi SHIOTA, Takayuki NOZAKI, Shinji YUASA
  • Patent number: 10431303
    Abstract: A resistance change type memory includes a variable resistance element connected between first and second bit lines and a write control circuit including first and second transistors each including a terminal connected to the first bit line. The write control circuit controls write to the variable resistance element. The write control circuit supplies a second voltage to the first bit line with a first pulse width via the second transistor in the ON state after supplying a first voltage to the first bit line via the first transistor.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 1, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Takayuki Nozaki, Yoshishige Suzuki, Shinji Yuasa, Yoichi Shiota, Takurou Ikeura, Hiroki Noguchi, Kazutaka Ikegami
  • Publication number: 20180158525
    Abstract: According to one embodiment, a resistance change type memory includes: a variable resistance element connected between first and second bit lines; a write control circuit including first and second transistors with terminals connected to the first and second bit lines, respectively, and controlling write to the variable resistance element; a first interconnect supplied with a first voltage and connected to the first bit line via the first transistor; and a second interconnect supplied with a second voltage higher than the first voltage, and connected to the first bit line via the second transistor. The write control circuit supplies the second voltage to the first bit line with a first pulse width via the second transistor in the ON state after supplying the first voltage to the first bit line via the first transistor.
    Type: Application
    Filed: November 30, 2017
    Publication date: June 7, 2018
    Applicant: National Institute of Advanced Science and Technology
    Inventors: Takayuki Nozaki, Yoshishige Suzuki, Shinji Yuasa, Yoichi Shiota, Takurou Ikeura, Hiroki Noguchi, Kazutaka Ikegami
  • Publication number: 20110049659
    Abstract: The present invention provides a magnetization control method controlling, utilizing no current-induced magnetic field or spin transfer torque a magnetization direction with low power consumption, an information storage method, an information storage element, and a magnetic function element. The magnetization control method involves controlling a magnetization direction of a magnetic layer, and includes: forming a structure including (i) the magnetic layer which is an ultrathin film ferromagnetic layer having a film thickness of one or more atomic layers and of 2 nm or less, and (ii) an insulating layer provided on the ultrathin film ferromagnetic layer and working as a potential barrier; and controlling a magnetization direction of the ultrathin film ferromagnetic layer by applying either (i) a voltage to opposing electrodes sandwiching the structure and a base layer or (ii) an electric field to the structure to change magnetic anisotropy of the ultrathin film ferromagnetic layer.
    Type: Application
    Filed: February 27, 2009
    Publication date: March 3, 2011
    Inventors: Yoshishige Suzuki, Takayuki Nozaki, Takuto Maruyama, Yoichi Shiota