Patents by Inventor Yoichi Takano

Yoichi Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9106060
    Abstract: A sheathing material includes a sheet base material on which a plurality of concave portions is regularly formed to be adjacent to each other by embossing processing. Each concave portion includes a polygonal lattice portion that includes a pair of V-shaped ridgelines, when seen from a plan view of the sheathing material, which is symmetrically arranged with respect to a symmetrical axis so that opening-sides of the V-shaped ridgelines are opposed to each other and is formed on a front side surface of the sheet base material, and a trough portion that includes a pair of inclined folding lines extending to come close to each other and inclined towards a backside of the sheet base material from respective apexes of the V-shaped ridgelines, when seen from the plan view, and a horizontal folding line connecting tips of the inclined folding lines.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: August 11, 2015
    Assignee: Yazaki Corporation
    Inventors: Yoichi Takano, Hiroe Norizuki, Masaaki Sawairi
  • Patent number: 9007045
    Abstract: An output device includes an output transistor that outputs an output current, a first driver that drives the output transistor so that a feedback voltage of an output voltage of the output transistor is in agreement with a reference voltage, an RC circuit that has a capacitor connected to the ground and a resistor connected in series to the capacitor, and a second driver that drives the output transistor to increase the output current when a potential difference between ends of the resistor, generated by the feedback voltage supplied between ends of the RC circuit, is increased by a decrease of the output voltage.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: April 14, 2015
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Akihiro Terada, Yoichi Takano, Shinichiro Maki
  • Patent number: 8872491
    Abstract: A regulator and a DC/DC converter are provided in which a soft start is carried out even when an output is short-circuited by abnormality. Regulator includes soft start circuit that gradually starts up a reference voltage that is input into error amplifier from 0 V to the reference voltage and soft start reset circuit that monitors an input of error amplifier and performs soft start of soft start circuit again when an output of output terminal Vo is short-circuited. Soft start reset circuit includes comparator that is disposed in parallel with an input of error amplifier, offset voltage that gives an offset to the input of comparator, and NPN transistor that is turned on or off in accordance with a result of comparison of comparator and discharges capacitor C by being turned on when the output is short-circuited.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: October 28, 2014
    Assignee: Mitsumi Electric Co., Ltd
    Inventors: Yoichi Takano, Naofumi Sato
  • Patent number: 8847569
    Abstract: A regulator includes a transistor connected between an input and an output. A feedback voltage controls the transistor to keep the output voltage constant. A first circuit functions as a comparator to compare a detection voltage from the output of the transistor and the feedback voltage when the output current is higher than a predetermined value, and functions as a buffer when the output current is lower than the predetermined value. A second circuit receives a reference voltage, the feedback voltage, and an output from the first circuit, and generates (i) a difference between the feedback voltage and the first circuit output when the reference voltage is lower than the first circuit output, and (ii) a difference voltage between the feedback voltage and the reference voltage when the reference voltage is higher than the first circuit output, and supplies a control voltage to control the output of the transistor.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: September 30, 2014
    Assignee: Mitsumi Electric, Ltd.
    Inventors: Akihiro Terada, Kohei Sakurai, Yoichi Takano
  • Publication number: 20140283989
    Abstract: A method of attaching armoring sheets for a wire harness includes following steps. In a first armoring sheet setting step, one of a pair of the armoring sheets is set in a positioning recess formed in a setting jig to fit side end surfaces of the one of the armoring sheets to insides of opposing inner side surfaces of the positioning recess. In a wire setting step, wires are set in the positioning recess. In a second armoring sheet setting step, the other of the armoring sheets is set in the positioning recess so as to cover the wires. In a vacuum bonding step, vacuuming is performed to bond the armoring sheets to each other so that side end portions of the armoring sheets are in close contact with each other.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Applicant: Yazaki Corporation
    Inventor: Yoichi TAKANO
  • Publication number: 20140212629
    Abstract: A sheathing material includes a sheet base material on which a plurality of concave portions is regularly formed to be adjacent to each other by embossing processing. Each concave portion includes a polygonal lattice portion that includes a pair of V-shaped ridgelines, when seen from a plan view of the sheathing material, which is symmetrically arranged with respect to a symmetrical axis so that opening-sides of the V-shaped ridgelines are opposed to each other and is formed on a front side surface of the sheet base material, and a trough portion that includes a pair of inclined folding lines extending to come close to each other and inclined towards a backside of the sheet base material from respective apexes of the V-shaped ridgelines, when seen from the plan view, and a horizontal folding line connecting tips of the inclined folding lines.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 31, 2014
    Applicant: Yazaki Corporation
    Inventors: Yoichi TAKANO, Hiroe NORIZUKI, Masaaki SAWAIRI
  • Patent number: 8716992
    Abstract: A current limiting circuit for limiting an output current in response to a control current includes a detection circuit to detect a detection voltage responsive to an output voltage, and a control current generating circuit to generate a control current responsive to the detection voltage, wherein the control current generating circuit includes a first transistor through which the control current flows, a second transistor that becomes conductive upon a voltage responsive to an amount of the control current being greater than a predetermined voltage above the detection voltage, and a resistor connecting between a base and an emitter of the second transistor to raise a potential at the base of the second transistor above a predetermined level, wherein the amount of the control current flowing through the first transistor decreases as an amount of a current flowing through the second transistor increases.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: May 6, 2014
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Yoichi Takano, Shinichiro Maki, Hiroshi Nozaki
  • Patent number: 8665020
    Abstract: A differential amplifier circuit including: a differential input stage including a pair of differential MOS transistors, a pair of load elements, and a first constant-current source; an output stage including an output MOS transistor and a second constant-current source; a constant-current MOS transistor provided in parallel to one of the first and second constant-current sources; and a boost current controlling MOS transistor in which a potential of a connection node of the output MOS transistor and the second constant-current source is applied to a gate terminal thereof; wherein the boost current controlling MOS transistor is turned on when a voltage inputted to a gate terminal of one of the pair of differential MOS transistors changes, and a current of the constant-current MOS transistor is added to one of the first and second constant-current sources and is allowed to flow.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: March 4, 2014
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Kohei Sakurai, Akihiro Terada, Yoichi Takano
  • Patent number: 8446180
    Abstract: A disclosed semiconductor device includes an input terminal, a power line, a pnp-bipolar transistor connected to the power line, a first resistor connecting an emitter of the transistor to the input terminal, a second resistor connecting a collector of the transistor to ground, an operation circuit operable when the input voltage is a predetermined voltage or higher, the predetermined voltage being set within a first voltage region in which the input voltage cannot turn on the transistor, a comparator comparing an internal voltage with a reference voltage, the internal voltage being changed from a voltage value in a non-conductive state in which the transistor is not turned on, and an output terminal configured to output an output voltage which changes in response to a result of comparing the internal voltage with the reference voltage.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: May 21, 2013
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Yoichi Takano
  • Patent number: 8248176
    Abstract: A disclosed current source circuit includes a current mirror circuit having two enhancement-type MOS transistors, a depletion-type MOS transistor configured to be connected to a drain of one of the two enhancement-type MOS transistors and to function as a constant current source, and a resistor configured to have a negative temperature property and be connected to a source of the one of the two enhancement-type MOS transistors.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: August 21, 2012
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Yoichi Takano, Koichi Yamaguchi, Koichi Kuwahara
  • Publication number: 20120126762
    Abstract: A current limiting circuit for limiting an output current in response to a control current includes a detection circuit to detect a detection voltage responsive to an output voltage, and a control current generating circuit to generate a control current responsive to the detection voltage, wherein the control current generating circuit includes a first transistor through which the control current flows, a second transistor that becomes conductive upon a voltage responsive to an amount of the control current being greater than a predetermined voltage above the detection voltage, and a resistor connecting between a base and an emitter of the second transistor to raise a potential at the base of the second transistor above a predetermined level, wherein the amount of the control current flowing through the first transistor decreases as an amount of a current flowing through the second transistor increases.
    Type: Application
    Filed: November 14, 2011
    Publication date: May 24, 2012
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Yoichi TAKANO, Shinichiro Maki, Hiroshi Nozaki
  • Publication number: 20120098513
    Abstract: A regulator includes a transistor connected between an input and an output. A feedback voltage controls the transistor to keep the output voltage constant. A first circuit functions as a comparator to compare a detection voltage from the output of the transistor and the feedback voltage when the output current is higher than a predetermined value, and functions as a buffer when the output current is lower than the predetermined value. A second circuit receives a reference voltage, the feedback voltage, and an output from the first circuit, and generates (i) a difference between the feedback voltage and the first circuit output when the reference voltage is lower than the first circuit output, and (ii) a difference voltage between the feedback voltage and the reference voltage when the reference voltage is higher than the first circuit output, and supplies a control voltage to control the output of the transistor.
    Type: Application
    Filed: October 20, 2011
    Publication date: April 26, 2012
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Akihiro TERADA, Kohei SAKURAI, Yoichi TAKANO
  • Publication number: 20120062198
    Abstract: A regulator and a DC/DC converter are provided in which a soft start is carried out even when an output is short-circuited by abnormality. Regulator includes soft start circuit that gradually starts up a reference voltage that is input into error amplifier from 0 V to the reference voltage and soft start reset circuit that monitors an input of error amplifier and performs soft start of soft start circuit again when an output of output terminal Vo is short-circuited. Soft start reset circuit includes comparator that is disposed in parallel with an input of error amplifier, offset voltage that gives an offset to the input of comparator, and NPN transistor that is turned on or off in accordance with a result of comparison of comparator and discharges capacitor C by being turned on when the output is short-circuited.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 15, 2012
    Inventors: Yoichi Takano, Naofumi Sato
  • Publication number: 20120001605
    Abstract: A differential amplifier circuit including: a differential input stage including a pair of differential MOS transistors, a pair of load elements, and a first constant-current source; an output stage including an output MOS transistor and a second constant-current source; a constant-current MOS transistor provided in parallel to one of the first and second constant-current sources; and a boost current controlling MOS transistor in which a potential of a connection node of the output MOS transistor and the second constant-current source is applied to a gate terminal thereof; wherein the boost current controlling MOS transistor is turned on when a voltage inputted to a gate terminal of one of the pair of differential MOS transistors changes, and a current of the constant-current MOS transistor is added to one of the first and second constant-current sources and is allowed to flow.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 5, 2012
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Kohei Sakurai, Akihiro Terada, Yoichi Takano
  • Publication number: 20110156822
    Abstract: A disclosed current source circuit includes a current mirror circuit having two enhancement-type MOS transistors, a depletion-type MOS transistor configured to be connected to a drain of one of the two enhancement-type MOS transistors and to function as a constant current source, and a resistor configured to have a negative temperature property and be connected to a source of the one of the two enhancement-type MOS transistors.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 30, 2011
    Inventors: YOICHI TAKANO, Koichi Yamaguchi, Koichi Kuwahara
  • Publication number: 20110001517
    Abstract: A disclosed semiconductor device includes an input terminal, a power line, a pnp-bipolar transistor connected to the power line, a first resistor connecting an emitter of the transistor to the input terminal, a second resistor connecting a collector of the transistor to ground, an operation circuit operable when the input voltage is a predetermined voltage or higher, the predetermined voltage being set within a first voltage region in which the input voltage cannot turn on the transistor, a comparator comparing an internal voltage with a reference voltage, the internal voltage being changed from a voltage value in a non-conductive state in which the transistor is not turned on, and an output terminal configured to output an output voltage which changes in response to a result of comparing the internal voltage with the reference voltage.
    Type: Application
    Filed: June 16, 2010
    Publication date: January 6, 2011
    Inventor: YOICHI TAKANO
  • Publication number: 20100320980
    Abstract: An output device includes an output transistor that outputs an output current, a first driver that drives the output transistor so that a feedback voltage of an output voltage of the output transistor is in agreement with a reference voltage, an RC circuit that has a capacitor connected to the ground and a resistor connected in series to the capacitor, and a second driver that drives the output transistor to increase the output current when a potential difference between ends of the resistor, generated by the feedback voltage supplied between ends of the RC circuit, is increased by a decrease of the output voltage.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 23, 2010
    Inventors: AKIHIRO TERADA, YOICHI TAKANO, SHINICHIRO MAKI
  • Patent number: 6323428
    Abstract: A structure for protecting a flexible flat cable (FFC) is structured so that the FFC and a plate member arranged along it are covered with a heat-shrinkable tube. The structure is provided with fixing portions and for a fixed member and a movable member on both ends. In this configuration, if the movable member is repeatedly moved in a two-dimensional arrangement, the FFC will not buckle, easily deform owing to any external force and wear. This lengthens the life of the FFC greatly.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: November 27, 2001
    Assignee: Yazaki Corporation
    Inventor: Yoichi Takano
  • Patent number: 5609814
    Abstract: An optical molding process for obtaining a three-dimensional resin model by scanning a surface of a photocurable resin liquid held in a photocurable resin liquid tank by a light beam to cure the same and successively building up the scanned and cured layers on an elevator. When the molding of one constant-height section layer is ended and the elevator is made to descend, the overflow of the photocurable resin liquid from the photocurable resin liquid tank to an overflow tank is temporarily blocked and then after the blocking of the overflow is lifted, the next constant-height section layer is molded.
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: March 11, 1997
    Assignee: Sony Corporation
    Inventor: Yoichi Takano
  • Patent number: 5525051
    Abstract: An optical molding apparatus for obtaining a three-dimensional resin model by scanning a surface of a photocurable resin liquid held in a photocurable resin liquid tank by a light beam to cure the same and successively building up the scanned and cured layers on an elevator. When the molding of one constant-height section layer is ended and the elevator is made to descend, the overflow of the photocurable resin liquid from the photocurable resin liquid tank to an overflow tank is temporarily blocked and then after the blocking of the overflow is lifted, the next constant-height section layer is molded.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 11, 1996
    Assignee: Sony Corporation
    Inventor: Yoichi Takano