Patents by Inventor Yoichi Yanai

Yoichi Yanai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Component mounting method
    Patent number: 6729532
    Abstract: A component mounting method for mounting several micro component chips aligned in parallel onto a board by soldering. An allowable offset is set for each electrode, taking into account a self-alignment effect of melted solder in soldering for bonding component terminals onto electrodes formed on the board corresponding to a component layout. Solder printing and component placement onto the electrodes are shifted by the offset. This offset is balanced by the self-alignment effect of melted solder, and each component is secured at an appropriate position. This mounting method allows less stringent spacing conditions to be applied for mounting and prevents the occurrence of defects during printing and placement.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: May 4, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masafumi Inoue, Yusuke Yamamoto, Hikaru Onizaki, Yoichi Yanai, Yasuhiro Morimitsu
  • Component mounting method
    Publication number: 20020112348
    Abstract: A component mounting method for mounting several micro component chips aligned in parallel onto a board by soldering. An allowable offset is set for each electrode, taking into account a self-alignment effect of melted solder in soldering for bonding component terminals onto electrodes formed on the board corresponding to a component layout. Solder printing and component placement onto the electrodes are shifted by the offset. This offset is balanced by the self-alignment effect of melted solder, and each component is secured at an appropriate position. This mounting method allows less stringent spacing conditions to be applied for mounting and prevents the occurrence of defects during printing and placement.
    Type: Application
    Filed: October 25, 2001
    Publication date: August 22, 2002
    Inventors: Masafumi Inoue, Yusuke Yamamoto, Hikaru Onizaki, Yoichi Yanai, Yasuhiro Morimitsu