Abstract: A photoelectric conversion device includes a first pixel including a photoelectric converter, a first node to which charge is transferred from the photoelectric converter, and a first transistor that resets a voltage of the first node, and configured to output a first signal in accordance with a voltage of the first node, a second pixel including a second node to which a predetermined voltage is supplied and a second transistor that resets a voltage of the second node, and configured to output a second signal in accordance with a voltage of the second node; and a control line connected to the first transistor and the second transistor. The first transistor resets the first node to a first voltage, and the second transistor resets the second node to a second voltage having a smaller amplitude than the first voltage.

Abstract: A photoelectric conversion member included in a photodiode PD2 is disposed at the position overlapping with a section B1, a photoelectric conversion member included in a photodiode PD1 is disposed at the position overlapping with a section B2, and a photoelectric conversion member included in the photodiode PD1 is disposed at the position overlapping with a section B3. A plurality of electrodes 25 each forming a Metal-Insulator-Semiconductor (MIS) structure together with a semiconductor layer 10 is disposed on a front surface FS of the semiconductor layer 10. At least one of the plurality of electrodes 25 overlaps with at least one of eight sections B2 to B9.

Abstract: A photoelectric conversion apparatus includes a semiconductor substrate, first and second micro lenses, a first filter with a transmittance of infrared light, and a second filter with a transmittance of visible light. At least one photoelectric conversion portion disposed so as to overlap the first filter in a planar view and a plurality of photoelectric conversion portions disposed so as to overlap the second filter in the planar view each include a first semiconductor region and a second semiconductor region. An impurity concentration of at least a part of the second semiconductor region of the at least one photoelectric conversion portion is lower than an impurity concentration of a portion in the second semiconductor regions of the plurality of photoelectric conversion portions that is disposed at the same depth as the at least a part of the second semiconductor region.

Abstract: According to one aspect of the invention, provided is a solid state imaging device having a pixel including a photoelectric conversion portion provided in a semiconductor substrate. The photoelectric conversion portion includes first and second charge accumulation region of a first conductivity type provided at a first depth of the semiconductor substrate and spaced apart from each other by a first gap, and first and second semiconductor region of a second conductivity type provided at a second depth located under the first depth of the semiconductor substrate and extend over the first charge accumulation region, the first gap, and the second charge accumulation region in a planar view. At the second depth, an impurity concentration of the second conductivity type in a region under the first gap is higher than an impurity concentration of the second conductivity type in a region under the first and second charge accumulation regions.

Abstract: A photoelectric conversion device includes a first pixel including a photoelectric converter, a first node to which charge is transferred from the photoelectric converter, and a first transistor that resets a voltage of the first node, and configured to output a first signal in accordance with a voltage of the first node, a second pixel including a second node to which a predetermined voltage is supplied and a second transistor that resets a voltage of the second node, and configured to output a second signal in accordance with a voltage of the second node; and a control line connected to the first transistor and the second transistor. The first transistor resets the first node to a first voltage, and the second transistor resets the second node to a second voltage having a smaller amplitude than the first voltage.

Abstract: A photoelectric conversion apparatus includes a semiconductor substrate, first and second micro lenses, a first filter with a transmittance of infrared light, and a second filter with a transmittance of visible light. At least one photoelectric conversion portion disposed so as to overlap the first filter in a planar view and a plurality of photoelectric conversion portions disposed so as to overlap the second filter in the planar view each include a first semiconductor region and a second semiconductor region. An impurity concentration of at least a part of the second semiconductor region of the at least one photoelectric conversion portion is lower than an impurity concentration of a portion in the second semiconductor regions of the plurality of photoelectric conversion portions that is disposed at the same depth as the at least a part of the second semiconductor region.

Abstract: A method of manufacturing an imaging device, including a first buried diode including a first semiconductor region and a second semiconductor region and a second buried diode including a third semiconductor region and a fourth semiconductor region, includes implanting first impurity ions of a first conductivity type into a first region and a third region between the first region and a second region, and implanting second impurity ions of the first conductivity type into the second region and the third region, wherein the first semiconductor region is formed by implanting the first impurity ions, the third semiconductor region is formed by implanting the second impurity ions, and a fifth semiconductor region having a higher impurity concentration than the first and the second semiconductor regions is formed in the third region by implanting the first and second impurity ions.

Abstract: A method of manufacturing an imaging device, including a first buried diode including a first semiconductor region and a second semiconductor region and a second buried diode including a third semiconductor region and a fourth semiconductor region, includes implanting first impurity ions of a first conductivity type into a first region and a third region between the first region and a second region, and implanting second impurity ions of the first conductivity type into the second region and the third region, wherein the first semiconductor region is formed by implanting the first impurity ions, the third semiconductor region is formed by implanting the second impurity ions, and a fifth semiconductor region having a higher impurity concentration than the first and the second semiconductor regions is formed in the third region by implanting the first and second impurity ions.

Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, wherein one pixel of the plurality of pixels is arranged in one unit pixel region of a plurality of unit pixel regions, a plurality of sub vertical output lines, each of which outputs pixel signals from the plurality of pixels in the same pixel column, and a plurality of block select circuits provided in one-to-one correspondence with the plurality of sub vertical output lines. A load capacitance connected to a main vertical output line is reduced by connecting the plurality of sub vertical output lines and the main vertical output line via the plurality of block select circuits. This makes high-speed pixel signal readout possible.

Abstract: According to one aspect of the invention, provided is a solid state imaging device having a pixel including a photoelectric conversion portion provided in a semiconductor substrate. The photoelectric conversion portion includes first and second charge accumulation region of a first conductivity type provided at a first depth of the semiconductor substrate and spaced apart from each other by a first gap, and first and second semiconductor region of a second conductivity type provided at a second depth located under the first depth of the semiconductor substrate and extend over the first charge accumulation region, the first gap, and the second charge accumulation region in a planar view. At the second depth, an impurity concentration of the second conductivity type in a region under the first gap is higher than an impurity concentration of the second conductivity type in a region under the first and second charge accumulation regions.

Abstract: A disclosed embodiment includes a first pixel including a photoelectric converter and a first transistor that transfers charges generated in the photoelectric converter to a first node, wherein the first pixel outputs a first signal based on a voltage of the first node, a second pixel including a second transistor that supplies a constant voltage to a second node, wherein the second pixel outputs a second signal based on a voltage of the second node, and a control line connected to the first transistor and the second transistor, wherein a capacitance value of a capacitance component coupled to the second node is greater than a capacitance value of a capacitance component coupled to the first node.

Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, wherein one pixel of the plurality of pixels is arranged in one unit pixel region of a plurality of unit pixel regions, a plurality of sub vertical output lines, each of which outputs pixel signals from the plurality of pixels in the same pixel column, and a plurality of block select circuits provided in one-to-one correspondence with the plurality of sub vertical output lines. A load capacitance connected to a main vertical output line is reduced by connecting the plurality of sub vertical output lines and the main vertical output line via the plurality of block select circuits. This makes high-speed pixel signal readout possible.

Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, wherein one pixel of the plurality of pixels is arranged in one unit pixel region of a plurality of unit pixel regions, a plurality of sub vertical output lines, each of which outputs pixel signals from the plurality of pixels in the same pixel column, and a plurality of block select circuits provided in one-to-one correspondence with the plurality of sub vertical output lines. A load capacitance connected to a main vertical output line is reduced by connecting the plurality of sub vertical output lines and the main vertical output line via the plurality of block select circuits. This makes high-speed pixel signal readout possible.

Abstract: An embodiment provides an imaging device including a pixel that includes a first photoelectric conversion portion, a second photoelectric conversion portion, a first transfer transistor, a second transfer transistor, and a floating diffusion portion. The first transfer transistor transfers a signal charge in the first photoelectric conversion portion to the floating diffusion portion. The second transfer transistor transfers a signal charge in the second photoelectric conversion portion to the floating diffusion portion. A potential at the first photoelectric conversion portion for the signal charge is higher than a potential at the second photoelectric conversion portion for the signal charge.

Abstract: An imaging device includes first and second photoelectric conversion portions, a charge holding portion, first and second transfer transistors, and an amplifier portion, wherein in a first control operation, from a state in which the first and the second transfer transistors are off, the first transfer transistor is turned on while the second transfer transistor remains off, in a second control operation, the first and the second transfer transistors are being on, and a difference between a control voltage provided in the first control operation to the first transfer transistor to turn on and a control voltage provided to the first transfer transistor to turn off is smaller than difference between a control voltage provided in the second control operation to the first transfer transistor to turn on and the control voltage provided to the first transistor to turn off.

Abstract: An imaging device includes first and second photoelectric conversion portions, a charge holding portion, first and second transfer transistors, and an amplifier portion, wherein in a first control operation, from a state in which the first and the second transfer transistors are off, the first transfer transistor is turned on while the second transfer transistor remains off, in a second control operation, the first and the second transfer transistors are being on, and a difference between a control voltage provided in the first control operation to the first transfer transistor to turn on and a control voltage provided to the first transfer transistor to turn off is smaller than difference between a control voltage provided in the second control operation to the first transfer transistor to turn on and the control voltage provided to the first transistor to turn off.

Abstract: An embodiment provides an imaging device including a pixel that includes a first photoelectric conversion portion, a second photoelectric conversion portion, a first transfer transistor, a second transfer transistor, and a floating diffusion portion. The first transfer transistor transfers a signal charge in the first photoelectric conversion portion to the floating diffusion portion. The second transfer transistor transfers a signal charge in the second photoelectric conversion portion to the floating diffusion portion. A potential at the first photoelectric conversion portion for the signal charge is higher than a potential at the second photoelectric conversion portion for the signal charge.

Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, wherein one pixel of the plurality of pixels is arranged in one unit pixel region of a plurality of unit pixel regions, a plurality of sub vertical output lines, each of which outputs pixel signals from the plurality of pixels in the same pixel column, and a plurality of block select circuits provided in one-to-one correspondence with the plurality of sub vertical output lines. A load capacitance connected to a main vertical output line is reduced by connecting the plurality of sub vertical output lines and the main vertical output line via the plurality of block select circuits. This makes high-speed pixel signal readout possible.

Abstract: A chemical sensor element contains a resonator having a first reflector in which particles of a fine metal structure are arranged two-dimensionally and periodically is counterposed with interposition of a dielectric layer to a second reflector, wherein the resonance wavelength of a resonator in which the entire of the first reflector is replaced by a metal thin film having the same thickness as the metal fine structure is different from the surface plasmon resonance wavelength induced in the metal fine structure; and the mode of the surface plasmon resonance excited in the metal fine structure is coupled with the mode of the resonator in which the entire of the first reflector is replaced by the metal thin film.

Abstract: An optical element includes a plurality of optical filters having different characteristics. The element includes a first optical filter including a first metal-structure group including first metal structures periodically arranged in an in-plane direction of a substrate surface and a second optical filter including a second metal-structure group including second metal structures periodically arranged in the in-plane direction, the second metal-structure group exhibiting a plasmon resonance condition different from that of the first metal-structure group. The optical distance between the first metal structures adjacent to each other is in a range of 0.75 to 1.25 times the optical distance between the second metal structures adjacent to each other.