Abstract: This receiving apparatus achieves circuit size reduction and consumption power reduction, while still having an advantage of high-speed processing. In a receiving apparatus (100), a frequency component detector (105) has a Fourier conversion operation unit provided therein, and performs high-speed Fourier conversion with respect to digital signals outputted from an ADC (104), said high-speed Fourier conversion being performed within a range instructed by means of an operation range control unit (106), and the frequency component detector detects a plurality of frequency components (FFT signals) of the digital signals. The operation range control unit (106) sets, using the FFT signals outputted from the frequency component detector (105), the frequency range within which the Fourier conversion operation is to be performed, and instructs the range to the frequency component detector (105).

Abstract: This receiving apparatus achieves circuit size reduction and consumption power reduction, while still having an advantage of high-speed processing. In a receiving apparatus (100), a frequency component detector (105) has a Fourier conversion operation unit provided therein, and performs high-speed Fourier conversion with respect to digital signals outputted from an ADC (104), said high-speed Fourier conversion being performed within a range instructed by means of an operation range control unit (106), and the frequency component detector detects a plurality of frequency components (FFT signals) of the digital signals. The operation range control unit (106) sets, using the FFT signals outputted from the frequency component detector (105), the frequency range within which the Fourier conversion operation is to be performed, and instructs the range to the frequency component detector (105).