Abstract: A SiC epitaxial wafer includes a SiC substrate and a SiC epitaxial layer disposed on the SiC substrate. The SiC epitaxial layer includes a high carrier concentration layer and two low carrier concentration layers having lower carrier concentration than the high carrier concentration layer, and being in contact with a top surface and a bottom surface of the high carrier concentration layer to sandwich the high carrier concentration layer. A difference in carrier concentration between the high carrier concentration layer and the low carrier concentration layers is 5×1014/cm3 or more and 2×1016/cm3 or less.

Abstract: The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 ?m or more and 350 ?m or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 1×1014/cm3 or more and 5×1015/cm3 or less.

Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.

Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.

Abstract: An epitaxial substrate includes a single-crystal substrate of silicon carbide, and an epitaxial layer of silicon carbide disposed on the single-crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single-crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.

Abstract: A silicon carbide epitaxial wafer includes a silicon carbide substrate and silicon carbide epitaxial layers formed on the silicon carbide substrate. Each of the silicon carbide epitaxial layers has a triangular defect. The silicon carbide epitaxial layer each have a step inside the triangular defect in the surface morphology of the triangular defect.

Abstract: A SiC epitaxial wafer includes a SiC substrate and a SiC epitaxial layer disposed on the SiC substrate. The SiC epitaxial layer includes a high carrier concentration layer and two low carrier concentration layers having lower carrier concentration than the high carrier concentration layer, and being in contact with a top surface and a bottom surface of the high carrier concentration layer to sandwich the high carrier concentration layer. A difference in carrier concentration between the high carrier concentration layer and the low carrier concentration layers is 5×1014/cm3 or more and 2×1016/cm3 or less.

Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.

Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.

Abstract: The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 ?m or more and 350 ?m or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 1×1014/cm3 or more and 5×1015/cm3 or less.

Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.

Abstract: An epitaxial substrate includes a single-crystal substrate of silicon carbide, and an epitaxial layer of silicon carbide disposed on the single-crystal substrate. The epitaxial layer includes a first epitaxial layer disposed on the single-crystal substrate, a second epitaxial layer disposed on the first epitaxial layer, and a third epitaxial layer disposed on the second epitaxial layer. The first epitaxial layer has a basal-plane-dislocation conversion rate of less than 95%. The second epitaxial layer has a basal-plane-dislocation conversion rate of more than 98%.

Abstract: A method for manufacturing a SiC epitaxial wafer includes: a first step of, by supplying a Si supply gas and a C supply gas, performing a first epitaxial growth on a SiC bulk substrate with a 4H—SiC(0001) having an off-angle of less than 5° as a main surface at a first temperature of 1480° C. or higher and 1530° C. or lower; a second step of stopping the supply of the Si supply gas and the C supply gas and increasing a temperature of the SiC bulk substrate from the first temperature to a second temperature; and a third step of, by supplying the Si supply gas and the C supply gas, performing a second epitaxial growth on the SiC bulk substrate having the temperature increased in the second step at the second temperature.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes: preparing a silicon carbide single crystal substrate having a flatness with an average roughness of 0.2 nm or less; gas-etching a surface of the silicon carbide single crystal substrate under an atmosphere of a reducing gas; and forming a silicon carbide layer on the gas-etched surface of the silicon carbide single crystal substrate, wherein an etching rate of the gas etching is made in a range of 0.5 ?m/hour or faster to 2.0 ?m/hour or slower.

Abstract: A single-crystal 4H-SiC substrate includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The recesses have a diameter no smaller than 2 ?m and no larger than 20 ?m. The recesses have a depth no smaller than 0.01 ?m and no larger than 0.1 ?m. A single-crystal 4H-SiC substrate also includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The density of the recesses in the epitaxial first single-crystal 4H-SiC layer is at least 10/cm2, and the epitaxial first single-crystal 4H-SiC layer has a defect density no larger than 2/cm2.

Abstract: A method for manufacturing a single-crystal 4H—SiC substrate includes preparing a 4H—SiC bulk single-crystal substrate having a flat surface, and growing an epitaxial first single-crystal 4H—SiC layer having recesses on the 4H—SiC bulk single-crystal substrate to a thickness X, measured in micrometers (?m). The recesses have a diameter Y, measured in micrometers, no smaller than 0.2*X and no larger than 2*X. In addition, the recesses have a depth Z, when measured in micrometers, no smaller than (0.95*X+0.5*10?3), and no larger than 10*X*10?3.

Abstract: A manufacturing method for manufacturing a silicon carbide epitaxial wafer includes: introducing a cleaning gas into a growth furnace to remove dendrite-like polycrystal of silicon carbide attached to an inner wall of the growth furnace; after introducing the cleaning gas, bringing a silicon carbide substrate in the growth furnace; and growing a silicon carbide epitaxial layer on the silicon carbide substrate by introducing a processing gas into the growth furnace to manufacture a silicon carbide epitaxial wafer, wherein the cleaning gas having fluid energy of 1.6E?4 [J] or higher is introduced into the growth furnace.

Abstract: A manufacturing method for manufacturing a silicon carbide epitaxial wafer includes: introducing a cleaning gas into a growth furnace to remove dendrite-like polycrystal of silicon carbide attached to an inner wall of the growth furnace; after introducing the cleaning gas, bringing a silicon carbide substrate in the growth furnace; and growing a silicon carbide epitaxial layer on the silicon carbide substrate by introducing a processing gas into the growth furnace to manufacture a silicon carbide epitaxial wafer, wherein the cleaning gas having fluid energy of 1.6E-4 [J] or higher is introduced into the growth furnace.

Abstract: A single-crystal 4H-SiC substrate includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The recesses have a diameter no smaller than 2 ?m and no larger than 20 ?m. The recesses have a depth no smaller than 0.01 ?m and no larger than 0.1 ?m. A single-crystal 4H-SiC substrate also includes a 4H-SiC bulk single-crystal substrate; and an epitaxial first single-crystal 4H-SiC layer on the 4H-SiC bulk single-crystal substrate and having recesses. The density of the recesses in the epitaxial first single-crystal 4H-SiC layer is at least 10/cm2, and the epitaxial first single-crystal 4H-SiC layer has a defect density no larger than 2/cm2.

Abstract: A method for manufacturing a single-crystal 4H-SiC substrate includes preparing a 4H-SiC bulk single-crystal substrate having a flat surface, and growing an epitaxial first single-crystal 4H-SiC layer having recesses on the 4H-SiC bulk single-crystal substrate to a thickness X, measured in micrometers (?m). The recesses have a diameter Y, measured in micrometers, no smaller than 0.2*X and no larger than 2*X. In addition, the recesses have a depth Z, when measured in micrometers, no smaller than (0.95*X+0.5*10?3), and no larger than 10*X*10?3.