Patents by Inventor Yoji Bito

Yoji Bito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7244625
    Abstract: When plasma ashing is performed on a resist on a wafer, deposit gas containing at least one type of deposit component to be generated from a resist by ashing is added to a gas for plasma generation supplied from a gas supply system for plasma generation, by a deposit gas supply system. By this, the deposit component is actively deposited on the inner surface of a wafer processing chamber so as to protect the inner face of the wafer processing chamber from plasma. As a result, damage of the wafer processing chamber during ashing and particle generation due to the damage are prevented.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: July 17, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsuhiko Onishi, Yoji Bito
  • Publication number: 20050194354
    Abstract: When plasma ashing is performed on a resist on a wafer, deposit gas containing at least one type of deposit component to be generated from a resist by ashing is added to a gas for plasma generation supplied from a gas supply system for plasma generation, by a deposit gas supply system. By this, the deposit component is actively deposited on the inner surface of a wafer processing chamber so as to protect the inner face of the wafer processing chamber from plasma. As a result, damage of the wafer processing chamber during ashing and particle generation due to the damage are prevented.
    Type: Application
    Filed: February 18, 2005
    Publication date: September 8, 2005
    Applicant: Matsushita Elec. Ind. Co., Ltd.
    Inventors: Katsuhiko Onishi, Yoji Bito
  • Patent number: 5989929
    Abstract: A reactor is composed of a lower frame of a chamber, a quartz dome, an upper electrode, an 0 ring, and the like. A lower electrode and a substrate as a workpiece to be processed thereon are disposed in the reactor. The temperature of the quartz dome is maintained at a temperature of 180.degree. C. or higher by means of a heater. Fluorocarbon gas such as C.sub.2 F.sub.6 gas or C.sub.4 F.sub.8 gas is introduced into the reactor through a gas inlet and RF power from a first RF power source is applied to an antenna coil to produce a plasma and thereby etch an oxide film on the substrate. By heating the quartz dome to a high temperature, a deposit which hinders the release of oxygen from a wall face is prevented from being attached and the deposit on the bottom of the hole which causes an etch stop during processing is removed with oxygen. This prevents the etch stop during an etching process for forming a deep hole.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: November 23, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Hideo Nikoh, Shinichi Imai, Nobuhiro Jiwari, Satoshi Nakagawa, Shoji Matsumoto, Yoji Bito
  • Patent number: 5840200
    Abstract: A device insulating film, a lower-layer platinum film, a ferroelectric film, an upper-layer platinum film, and a titanium film are sequentially formed on a semiconductor substrate in this order. On the titanium film, a photoresist mask is further formed in a desired pattern. The thickness of the titanium film is adjusted to be 1/10 or more of the total thickness of a multilayer film consisting of the upper-layer platinum film, the ferroelectric film, and the lower-layer platinum film. The titanium film is then subjected to dry etching and the photoresist film is removed by ashing process. The titanium film thus patterned is used as a mask in etching the upper-layer platinum film, the ferroelectric film, and the lower-layer platinum film by a dry-etching method using a plasma of a gas mixture of chlorine and oxygen in which the volume concentration of oxygen gas is adjusted to be 40%. During the dry-etching process, the titanium film is oxidized to provide a high etching selectivity.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: November 24, 1998
    Assignee: Matsushita Electronics Corporation
    Inventors: Satoshi Nakagawa, Toyoji Ito, Yoji Bito, Yoshihisa Nagano