Patents by Inventor Yoji Hata

Yoji Hata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8993255
    Abstract: The present invention provides: a protein having a fructosyl amino acid oxidase activity which protein is useful for measurement of a glycosylated protein (particularly, glycosylated hemoglobin); a modified protein thereof; and use of the protein or the modified protein. The protein of the present invention is, for example, a fructosyl valyl histidine oxidase derived from Phaeosphaeria nodorum, the fructosyl valyl histidine oxidase having excellent thermal stability and substrate specificity and also having a small Km value to fructosyl valyl histidine. This allows a glycosylated protein measuring reagent to be stored in a long time and measurement accuracy of the glycosylated protein measuring reagent to be improved.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: March 31, 2015
    Assignees: Toyo Boseki Kabushiki Kaisha, Gekkeikan Sake Co., Ltd.
    Inventors: Rie Hirao, Masao Kitabayashi, Yoshiaki Nishiya, Hiroki Ishida, Yoji Hata
  • Publication number: 20110195444
    Abstract: The present invention provides: a protein having a fructosyl amino acid oxidase activity which protein is useful for measurement of a glycosylated protein (particularly, glycosylated hemoglobin); a modified protein thereof; and use of the protein or the modified protein. The protein of the present invention is, for example, a fructosyl valyl histidine oxidase derived from Phaeosphaeria nodorum, the fructosyl valyl histidine oxidase having excellent thermal stability and substrate specificity and also having a small Km value to fructosyl valyl histidine. This allows a glycosylated protein measuring reagent to be stored in a long time and measurement accuracy of the glycosylated protein measuring reagent to be improved.
    Type: Application
    Filed: October 6, 2009
    Publication date: August 11, 2011
    Applicants: TOYO BOSEKI KABUSHIKI KAISHA, GEKKEIKAN SAKE CO., LTD.
    Inventors: Rie Hirao, Masao Kitabayashi, Yoshiaki Nishiya, Hiroki Ishida, Yoji Hata
  • Publication number: 20110014649
    Abstract: The present invention relates to the production of an N36-binding peptide at low cost and in a large quantity utilizing a microorganism. More specifically, the present invention relates to a method for producing an N36-binding peptide comprising introducing a recombinant vector into which a DNA molecule encoding an N36-binding peptide that binds to an N36 protein derived from a retrovirus that causes immunodeficiency in a mammal has been incorporated into E. coli as a host to produce a transformant.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 20, 2011
    Applicant: GEKKEIKAN SAKE CO., LTD.
    Inventors: Hiroko Tsutsumi, Hiroki Ishida, Hiromoto Hisada, Makiko Mizumoto, Yoji Hata, Nobutaka Fujii, Masao Matsuoka, Eiichi Kodama, Shinya Oishi
  • Patent number: 7776105
    Abstract: An air-oxidative type hair dye composition containing a melanin precursor prepared by a process including (A) an oxidation step for converting, into the melanin precursor, a tyrosine or derivative thereof used as a starting substance with an enzyme or cell that is derived from a fungus selected from the group consisting of fungi belonging to the genera Aspergillus, Neurospora, Rhizomucor, Trichoderma, and Penicillium and that exhibits a catechol oxidase activity.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: August 17, 2010
    Assignees: Kao Corporation, Gekkeikan Sake Co., Ltd.
    Inventors: Kenzo Koike, Yoshinori Saito, Hiroshi Obata, Yukihiro Nakamura, Yoji Hata
  • Publication number: 20090178209
    Abstract: An air-oxidative type hair dye composition containing a melanin precursor prepared by a process including (A) an oxidation step for converting, into the melanin precursor, a tyrosine or derivative thereof used as a starting substance with an enzyme or cell that is derived from a fungus selected from the group consisting of fungi belonging to the genera Aspergillus, Neurospora, Rhizomucor, Trichoderma, and Penicillium and that exhibits a catechol oxidase activity.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 16, 2009
    Inventors: Kenzo Koike, Yoshinori Saito, Hiroshi Obata, Yukihiro Nakamura, Yoji Hata
  • Publication number: 20080113899
    Abstract: The present inventors have found that a siderophore-iron (III) ion chelate complex is highly absorbed in the body; significantly increases the blood hemoglobin concentration, the serum iron concentration and the concentration of iron stored in the liver; and causes no adverse effects on the body. On the basis of these findings, the present inventors provide iron supplementing agents, agents for the prevention or treatment of iron defeciency anemia, food additives and food compositions, each of which contains a siderophore and iron (III) ions, preferably in the form of a chelate complex.
    Type: Application
    Filed: January 13, 2005
    Publication date: May 15, 2008
    Applicant: GEKKEIKAN SAKE CO., LTD.
    Inventors: Sachiko Suzuki, Katsuharu Fukuda, Motoko Irie, Yoji Hata, Akitsugu Kawato, Yasuhisa Abe
  • Patent number: 7279923
    Abstract: The present invention provides an LSI inspection method and a defect inspection data analysis apparatus capable of shortening a time needed for a wafer test. In a first database 11 is stored inspection data obtained when each defect inspection apparatus 20 inspects a wafer for defects in the front-end process. In a second database 12 are stored non-conforming article judgment criteria for each predetermined type of defect, according to which a non-conforming chip is judged. A defective chip identifying portion 16 identifies a chip having a defect and identifies the type of defect for each defect that the identified chip has, on the basis of the inspection data. For each identified chip, a non-conforming chip judging portion 17 judges whether the chip is a non-conforming article or not according to the non-conforming article judgment criteria corresponding to the type of defect for each defect, and obtains position information within the wafer surface of a chip judged as being a non-conforming article.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: October 9, 2007
    Assignee: UMC Japan
    Inventor: Yoji Hata
  • Publication number: 20070007988
    Abstract: The present invention provides an LSI inspection method and a defect inspection data analysis apparatus capable of shortening a time needed for a wafer test. In a first database 11 is stored inspection data obtained when each defect inspection apparatus 20 inspects a wafer for defects in the front-end process. In a second database 12 are stored non-conforming article judgment criteria for each predetermined type of defect, according to which a non-conforming chip is judged. A defective chip identifying portion 16 identifies a chip having a defect and identifies the type of defect for each defect that the identified chip has, on the basis of the inspection data. For each identified chip, a non-conforming chip judging portion 17 judges whether the chip is a non-conforming article or not according to the non-conforming article judgment criteria corresponding to the type of defect for each defect, and obtains position information within the wafer surface of a chip judged as being a non-conforming article.
    Type: Application
    Filed: September 7, 2006
    Publication date: January 11, 2007
    Applicant: UMC Japan
    Inventor: Yoji Hata
  • Patent number: 7123041
    Abstract: The present invention provides an LSI inspection method and a defect inspection data analysis apparatus capable of shortening a time needed for a wafer test. In a first database 11 is stored inspection data obtained when each defect inspection apparatus 20 inspects a wafer for defects in the front-end process. In a second database 12 are stored non-conforming article judgment criteria for each predetermined type of defect, according to which a non-conforming chip is judged. A defective chip identifying portion 16 identifies a chip having a defect and identifies the type of defect for each defect that the identified chip has, on the basis of the inspection data. For each identified chip, a non-conforming chip judging portion 17 judges whether the chip is a non-conforming article or not according to the non-conforming article judgment criteria corresponding to the type of defect for each defect, and obtains position information within the wafer surface of a chip judged as being a non-conforming article.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: October 17, 2006
    Assignee: UMC Japan
    Inventor: Yoji Hata
  • Patent number: 7074526
    Abstract: A photomask by which no electrostatic damage or damage of a mask pattern due to electrification is produced. The photomask has a substrate; mask patterns formed on the substrate, which are made of a light blocking material and are covered with a light-transmissive and electrically conductive polymer material. Even the mask patterns which are isolated from each other on the substrate are electrically conductive with each other. Typically, the mask patterns are covered with an electrically conductive film made of the light-transmissive and electrically conductive polymer material. The electrically conductive film may have a thickness by which when foreign particles land on the electrically conductive film, an optical image of the foreign particles is defocused on a sample to be exposed in the exposure process, so that shapes of the foreign particles are not transferred. In this case, a pellicle, which is conventionally provided on the substrate, is unnecessary.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: July 11, 2006
    Assignee: UMC Japan
    Inventor: Yoji Hata
  • Publication number: 20040203179
    Abstract: The present invention provides an LSI inspection method and a defect inspection data analysis apparatus capable of shortening a time needed for a wafer test. In a first database 11 is stored inspection data obtained when each defect inspection apparatus 20 inspects a wafer for defects in the front-end process. In a second database 12 are stored non-conforming article judgment criteria for each predetermined type of defect, according to which a non-conforming chip is judged. A defective chip identifying portion 16 identifies a chip having a defect and identifies the type of defect for each defect that the identified chip has, on the basis of the inspection data. For each identified chip, a non-conforming chip judging portion 17 judges whether the chip is a non-conforming article or not according to the non-conforming article judgment criteria corresponding to the type of defect for each defect, and obtains position information within the wafer surface of a chip judged as being a non-conforming article.
    Type: Application
    Filed: March 26, 2004
    Publication date: October 14, 2004
    Applicant: UMC Japan
    Inventor: Yoji Hata
  • Patent number: 6797997
    Abstract: A semiconductor memory apparatus that stores data by accumulating charges in its capacitor is provided for allowing itself to be operated at a low potential and at a high speed. In the semiconductor memory apparatus, before performing a precharge by a precharging circuit 10 for the next cycle of read and write, a forced step-down circuit 11 previously lowers the potential of the bit line BL charged on the high side to a level within the range of preventing data of positive charges written and stored in a memory cell MC from being disappeared.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: September 28, 2004
    Assignee: UMC Japan
    Inventor: Yoji Hata
  • Publication number: 20040018437
    Abstract: A photomask by which no electrostatic damage or damage of a mask pattern due to electrification is produced. The photomask has a substrate; mask patterns formed on the substrate, which are made of a light blocking material and are covered with a light-transmissive and electrically conductive polymer material. Even the mask patterns which are isolated from each other on the substrate are electrically conductive with each other. Typically, the mask patterns are covered with an electrically conductive film made of the light-transmissive and electrically conductive polymer material. The electrically conductive film may have a thickness by which when foreign particles land on the electrically conductive film, an optical image of the foreign particles is defocused on a sample to be exposed in the exposure process, so that shapes of the foreign particles are not transferred. In this case, a pellicle, which is conventionally provided on the substrate, is unnecessary.
    Type: Application
    Filed: June 5, 2003
    Publication date: January 29, 2004
    Applicant: UMC Japan
    Inventor: Yoji Hata
  • Publication number: 20040007719
    Abstract: A semiconductor memory apparatus that stores data by accumulating charges in its capacitor is provided for allowing itself to be operated at a low potential and at a high speed. In the semiconductor memory apparatus, before performing a precharge by a precharging circuit 10 for the next cycle of read and write, a forced step-down circuit 11 previously lowers the potential of the bit line BL charged on the high side to a level within the range of preventing data of positive charges written and stored in a memory cell MC from being disappeared.
    Type: Application
    Filed: July 1, 2003
    Publication date: January 15, 2004
    Applicant: UMC Japan
    Inventor: Yoji Hata
  • Patent number: 6558920
    Abstract: According to the protein expression system in which a variety of desired useful proteins are highly produced by fusing a coding region of useful protein gene to the downstream of a promoter region of a tyrosinase-encoding gene (melO) of Aspergillus oryzae by a usual method of DNA manipulation, transferring a plasmid containing the resulting novel fusion gene into Aspergillus oryzae and incubating the thus-obtained transformant, various proteins can efficiently be produced at a high purity and in a high yield.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: May 6, 2003
    Assignee: Gekkeikan Sake Company Limited
    Inventors: Yoji Hata, Hiroki Ishida, Hiromoto Hisada, Eiji Ichikawa, Akitsugu Kawato, Yasuhisa Abe, Koji Suginami, Satoshi Imayasu
  • Patent number: 6144080
    Abstract: A semiconductor integrated circuit has P-channel active MOSFETs and N-channel active MOSFETs formed in a semiconductor substrate. In order to electrically isolate the active MOSFETs, the semiconductor integrated circuit has P-channel field shield MOS devices and N-channel field shield MOS devices. The P-channel field shield MOS devices have field shield electrodes which are laid on regions between impurity diffusion regions of the P-channel active MOSFETs. The N-channel field shield MOS devices have field shield electrodes which are laid on regions between impurity diffusion regions of N-channel active MOSFETs. A P-channel field shield voltage, which is higher than a power supply voltage of the semiconductor integrated circuit, is supplied to the field shield electrodes of the P-channel field shield MOS device to turn the P-channel field shield MOS devices to an OFF-state to electrically isolate the P-channel active MOSFETs.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: November 7, 2000
    Assignee: Nippon Steel Semiconductor Corporation
    Inventors: Toshio Wada, Yoji Hata