Patents by Inventor Yoji Kitano

Yoji Kitano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030681
    Abstract: A light-emitting device includes a light-emitting unit, an insulating layer, and a conductive layer to which a predetermined potential is applied. The light-emitting unit includes a first semiconductor layer, a second semiconductor layer having a conductivity type different from a conductivity type of the first semiconductor layer, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer. The insulating layer covers the light-emitting unit. The conductive layer is provided in the insulating layer and electrically separated from the light-emitting unit.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 25, 2024
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takashi MIYATA, Yoji KITANO
  • Publication number: 20230283044
    Abstract: A light-emitting device including a substrate, a plurality of column portions each including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type different from the first conductivity type, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, an electrode including a first electrode layer electrically coupled to the second semiconductor layer of each of the plurality of column portions, and a second electrode layer provided on an opposite side of the first electrode layer from the substrate and having an electrical resistivity lower than an electrical resistivity of the first electrode layer, wherein the first electrode layer includes a first portion in contact with the second electrode layer on the opposite side from the substrate, and a second portion not in contact with the second electrode layer on the opposite side from the substrate and having a greater thickness than the first portio
    Type: Application
    Filed: March 2, 2023
    Publication date: September 7, 2023
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takashi MIYATA, Yoji KITANO
  • Publication number: 20230031175
    Abstract: A light-emitting device includes a substrate, a laminated structure provided at the substrate, and a conductive layer provided at the laminated structure and configured to apply an electric current to the laminated structure. The laminated structure is provided between the substrate and the conductive layer, and includes a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type different from the first conductive type, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer. The conductive layer includes a plurality of wire portions extending in a direction orthogonal to a lamination direction of the laminated structure, and is configured to polarize light generated at the light-emitting layer, and an electric current is applied to the light-emitting layer via the plurality of wire portions.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 2, 2023
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Masaaki AOTA, Yoji KITANO
  • Publication number: 20220199861
    Abstract: A light emitting device includes n columnar parts, and an electrode configured to inject an electrical current into the n columnar parts, wherein each of the n columnar parts includes a first semiconductor layer, a second semiconductor layer different in conductivity type from the first semiconductor layer, and a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer, when viewed from a stacking direction of the first semiconductor layer and the light emitting layer, p first columnar parts out of the n columnar parts fail to overlap an outer edge of the electrode, q second columnar parts out of the n columnar parts overlap the outer edge of the electrode, a number of the second columnar parts centers of which overlap the electrode out of the q second columnar parts is larger than a number of the second columnar parts centers of which fail to overlap the electrode, and n=p+q is fulfilled.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventors: Takafumi Noda, Yoji Kitano
  • Publication number: 20220200233
    Abstract: A light emitting device includes a substrate, a transistor, a light emitting element, and an interconnection configured to electrically couple the transistor and the light emitting element to each other, wherein the transistor includes a first impurity region provided to the substrate, a second impurity region which is provided to the substrate, and is same in conductivity type as the first impurity region, and a gate, the light emitting element has a stacked body having a plurality of columnar parts, each of the columnar parts includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer, the first semiconductor layer is disposed between the substrate and the light emitting layer, the interconnection is a third impurity region provided to the substrate, the stacked body is provided to the third impurity region, the third impurity region is same in conductivity type as the first semiconductor layer, the third impurity region is electrically coupled to the first semiconductor l
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventors: Takafumi NODA, Yoji KITANO
  • Patent number: 11258232
    Abstract: A light emitter includes a substrate, a first semiconductor layer having a first conductivity type, a second semiconductor layer having a second conductivity type different from the first conductivity type, a light emitting layer provided between the first semiconductor layer and the second semiconductor layer and capable of emitting light when current is injected into the light emitting layer, and a third semiconductor layer provided between the substrate and the first semiconductor layer and having the second conductivity type, in which the first semiconductor layer is provided between the third semiconductor layer and the light emitting layer, and the third semiconductor layer has a protruding/recessed structure.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: February 22, 2022
    Inventors: Takafumi Noda, Yoji Kitano
  • Patent number: 10647112
    Abstract: A liquid droplet discharging apparatus includes: a first piezoelectric element that moves a head in a first direction; a second piezoelectric element that moves the head in a second direction opposite to the first direction; a movement unit that moves a medium in the first direction in accordance with a predetermined target movement amount; a transport amount measurement unit as a movement amount measurement unit that measures a movement amount of the medium in the first direction; and a drive control unit that controls driving of the first piezoelectric element and the second piezoelectric element. The drive control unit drives either one of the first piezoelectric element or the second piezoelectric element according to a difference B?A between a target transport amount A as the target movement amount and a transport amount B as the movement amount measured from the transport amount measurement unit.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 12, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Yoji Kitano, Junichi Okamoto
  • Publication number: 20200076160
    Abstract: A light emitter includes a substrate, a first semiconductor layer having a first conductivity type, a second semiconductor layer having a second conductivity type different from the first conductivity type, a light emitting layer provided between the first semiconductor layer and the second semiconductor layer and capable of emitting light when current is injected into the light emitting layer, and a third semiconductor layer provided between the substrate and the first semiconductor layer and having the second conductivity type, in which the first semiconductor layer is provided between the third semiconductor layer and the light emitting layer, and the third semiconductor layer has a protruding/recessed structure.
    Type: Application
    Filed: April 16, 2018
    Publication date: March 5, 2020
    Inventors: Takafumi NODA, Yoji KITANO
  • Publication number: 20190054738
    Abstract: A liquid droplet discharging apparatus includes: a first piezoelectric element that moves a head in a first direction; a second piezoelectric element that moves the head in a second direction opposite to the first direction; a movement unit that moves a medium in the first direction in accordance with a predetermined target movement amount; a transport amount measurement unit as a movement amount measurement unit that measures a movement amount of the medium in the first direction; and a drive control unit that controls driving of the first piezoelectric element and the second piezoelectric element. The drive control unit drives either one of the first piezoelectric element or the second piezoelectric element according to a difference B?A between a target transport amount A as the target movement amount and a transport amount B as the movement amount measured from the transport amount measurement unit.
    Type: Application
    Filed: August 20, 2018
    Publication date: February 21, 2019
    Inventors: Yoji KITANO, Junichi OKAMOTO
  • Patent number: 9089055
    Abstract: An electronic device includes a substrate, a cavity part formed above the substrate with a functional device placed therein, a coating structure that defines the cavity part, and the coating structure has a first surrounding wall formed around the cavity part above the substrate, a second surrounding wall formed around the cavity part above the first surrounding wall, a coating layer that defines an upper surface of the cavity part, wherein the second surrounding wall is located inside the first surrounding wall in a plan view.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: July 21, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Yoji Kitano, Norio Okuyama
  • Publication number: 20140311241
    Abstract: A MEMS pressure sensor includes a diaphragm portion that becomes displaced according to a pressure, and a resonator arranged on a main surface of the diaphragm portion. The resonator includes: a first fixed electrode provided on the main surface; and a drive electrode having a second fixed electrode provided on the main surface, a movable electrode spaced apart from the first fixed electrode, overlapping with the first fixed electrode, as viewed in a plan view seen from a normal direction to the main surface, and driven in a direction that intersects the main surface, and a supporting electrode supporting the movable electrode and connected to the second fixed electrode.
    Type: Application
    Filed: April 21, 2014
    Publication date: October 23, 2014
    Applicant: Seiko Epson Corporation
    Inventor: Yoji KITANO
  • Publication number: 20140070900
    Abstract: An electronic device includes a substrate, a cavity part formed above the substrate with a functional device placed therein, a coating structure that defines the cavity part, and the coating structure has a first surrounding wall formed around the cavity part above the substrate, a second surrounding wall formed around the cavity part above the first surrounding wall, a coating layer that defines an upper surface of the cavity part, wherein the second surrounding wall is located inside the first surrounding wall in a plan view.
    Type: Application
    Filed: September 5, 2013
    Publication date: March 13, 2014
    Applicant: Seiko Epson Corporation
    Inventors: Yoji Kitano, Norio Okuyama
  • Publication number: 20140054729
    Abstract: A MEMS device includes a first oxide film that is laminated on a main surface of a wafer substrate, a lower-layer wire portion that is provided on the first oxide film, a nitride film that is laminated so as to cover the first oxide film and the lower-layer wire portion, a sidewall portion that is laminated on the nitride film and is formed in a frame shape, a cavity portion that is partitioned by the sidewall portion, and a MEMS structure that is disposed in the cavity portion, in which the nitride film includes a through hole reaching the lower-layer wire portion, and in which the MEMS structure is electrically connected to the lower-layer wire portion by an electrical connection portion provided in the through hole.
    Type: Application
    Filed: August 14, 2013
    Publication date: February 27, 2014
    Applicant: Seiko Epson Corporation
    Inventors: Yoji Kitano, Takuya Kinugawa
  • Patent number: 8164144
    Abstract: A semiconductor device includes a semiconductor layer on an insulating layer, and a first partially depleted transistor and a first diode in the semiconductor layer. The first transistor has a first gate electrode above the semiconductor layer via an insulating film and a first source or drain of a first conductivity type in the semiconductor layer below both sides of the gate electrode. The first diode has a first impurity layer of a second conductivity type in a shallow portion of the semiconductor layer and a second impurity layer of the first conductivity type in a deep portion of the semiconductor layer. The first and second impurity layers are stacked in a depth direction of the semiconductor layer. The side surfaces of the first and second impurity layers contact the semiconductor layer just below the first gate electrode.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: April 24, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Yoji Kitano
  • Publication number: 20110115030
    Abstract: A semiconductor device includes: a partially depleted first transistor formed in a semiconductor layer on an insulating layer; a second transistor formed in the semiconductor layer; and a third transistor formed in the semiconductor layer, wherein the first transistor has a first gate electrode formed above the semiconductor layer via an insulating film and a first source or a first drain of a first conductivity type formed in the semiconductor layer below a side of the first gate electrode, the second transistor has a second gate electrode formed above the semiconductor layer via the insulating film and a second source or a second drain of the first conductivity type formed in the semiconductor layer below a side of the second gate electrode, the third transistor has a third gate electrode formed above the semiconductor layer via the insulating film and a third source or a third drain of a second conductivity type formed in the semiconductor layer below a side of the third gate electrode, one of the first so
    Type: Application
    Filed: November 15, 2010
    Publication date: May 19, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoji KITANO
  • Publication number: 20100252884
    Abstract: A semiconductor device includes: an insulating layer; a semiconductor layer formed on the insulating layer; a first partially depleted transistor formed in the semiconductor layer; and a second transistor formed in the semiconductor layer, wherein the first transistor has a first gate electrode formed above the semiconductor layer via an insulating film and a first source or a first drain of a first conductivity type formed in the semiconductor layer below both sides of the first gate electrode, the second transistor has a second gate electrode formed above the semiconductor layer via an insulating film and a second source or a second drain of a second conductivity type formed in the semiconductor layer below both sides of the second gate electrode, and one of the second source and the second drain is electrically connected to the semiconductor layer in a region just below the first gate electrode.
    Type: Application
    Filed: March 24, 2010
    Publication date: October 7, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoji KITANO
  • Publication number: 20100244134
    Abstract: A semiconductor device includes: an insulating layer; a semiconductor layer formed on the insulating layer; a first partially depleted transistor formed in the semiconductor layer; and a first diode formed in the semiconductor layer, wherein the first transistor has a first gate electrode formed above the semiconductor layer via an insulating film and a first source or a first drain of a first conductivity type formed in the semiconductor layer below both sides of the gate electrode, the first diode has a first impurity layer of a second conductivity type formed in a shallow portion of the semiconductor layer and a second impurity layer of the first conductivity type formed in a deep portion of the semiconductor layer, the first impurity layer and the second impurity layer are stacked in a depth direction of the semiconductor layer, and a side surface of the first impurity layer and a side surface of the second impurity layer are in contact with the semiconductor layer in a region just below the first gate el
    Type: Application
    Filed: March 9, 2010
    Publication date: September 30, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoji KITANO
  • Publication number: 20090230502
    Abstract: A method for manufacturing a semiconductor device includes: forming a first semiconductor layer on a semiconductor substrate; forming a second semiconductor layer on the first semiconductor layer; forming a first groove which penetrates the first and the second semiconductor layers by etching the first and the second semiconductor layers; forming a support in the first groove; forming a second groove so that the first semiconductor layer is exposed by etching the second semiconductor layer; forming a cavity between the second semiconductor layer and the semiconductor substrate by etching the first semiconductor layer through the second groove; and forming an insulating film inside the cavity. In the step of forming the second groove, the second semiconductor layer is formed so as to have a first region, a second region, and a third region in a plan view. The first groove includes a plurality of first grooves. The first region is sandwiched between the first grooves in a first direction in the plan view.
    Type: Application
    Filed: February 20, 2009
    Publication date: September 17, 2009
    Applicant: Seiko Epson Corporation
    Inventor: Yoji KITANO
  • Publication number: 20090230473
    Abstract: A semiconductor device includes a semiconductor layer formed on a substrate with an insulating film interposed therebetween, a gate insulating film formed on the semiconductor layer, a gate electrode which is formed on the gate insulating film, and includes a first region having a circular pattern in a plan view, a source and a drain which are respectively formed in the semiconductor layer inside and outside the first region in the plan view, and a wiring line which couples one of the source and the drain with the gate electrode.
    Type: Application
    Filed: February 24, 2009
    Publication date: September 17, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoji KITANO
  • Publication number: 20080237689
    Abstract: A nonvolatile semiconductor memory device includes a first insulating film formed on a semiconductor substrate, a floating gate formed on the first insulating film, a second insulating film on the floating gate, a semiconductor layer formed on the second insulating film, a gate insulating film formed on the semiconductor layer, and a control gate formed on the gate insulating film. The semiconductor substrate is provided with a first source and a first drain both for writing of data, and the semiconductor layer below both sides of the control gate is provided with a second source and a second drain both for readout of the data.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 2, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoji Kitano