Patents by Inventor Yoji Mashiko

Yoji Mashiko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121912
    Abstract: A cold plate includes: a metal base plate having a first surface, a second surface on a side opposite the first surface, and fins disposed in parallel on the first surface; and a topped cylindrical resin cover covering the fins. The first surface has a recessed portion recessed toward the second surface. The topped cylindrical resin cover is heat-fused to the metal base plate on an inner surface of the recessed portion.
    Type: Application
    Filed: January 21, 2022
    Publication date: April 11, 2024
    Applicant: Fujikura Ltd.
    Inventors: Masahiro Matsuda, Koichi Mashiko, Yoji Kawahara
  • Publication number: 20040203257
    Abstract: A processing technique of a semiconductor substrate which can improve a capability of a solid immersion lens in case of processing the semiconductor substrate and forming the solid immersion lens on its surface is provided.
    Type: Application
    Filed: October 31, 2003
    Publication date: October 14, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Takeshi Yoshida, Tohru Koyama, Yoji Mashiko
  • Patent number: 6545470
    Abstract: It is an object to obtain a scanning probe microscope capable of effectively suppressing a reduction in precision in a measurement. A conductive probe (2C) has such a pyramid structure as to be expanded from a tip portion to a bottom surface (a surface on which a cantilever (1) is to be formed) and a semiconductor integrated circuit (12) is formed in a side surface of the conductive probe (2C). An amplifying circuit (12a) to be the semiconductor integrated circuit (12) amplifies an electrical characteristic signal given from the conductive probe (2C) to send the electrical characteristic signal to a signal processor (10) through a conductive cantilever (1C) and a signal cable (9).
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: April 8, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yukari Imai, Hitoshi Maeda, Mari Tsugami, Yoji Mashiko
  • Publication number: 20030047810
    Abstract: An insulating film provided on an underlying layer (1) is selectively removed, thereby forming an insulating columnar body (4) standing on the underlying layer (1). A conductive film (7) is provided to cover the columnar body (4). Next, an interlayer insulating film (9) is provided to bury the columnar body (4) and the conductive film (7). The upper surface of the interlayer insulating film (9) is polished and planarized to the extent that the conductive film (7) is exposed. Thereafter an upper interconnect line (10) is provided. A lower interconnect line (8) and the upper interconnect line (10) are thereby connected through the conductive film (7).
    Type: Application
    Filed: June 17, 2002
    Publication date: March 13, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hitoshi Maeda, Fumihito Ohta, Koji Fukumoto, Yoji Mashiko
  • Publication number: 20030025498
    Abstract: It is an object to obtain a scanning probe microscope capable of effectively suppressing a reduction in precision in a measurement. A conductive probe (2C) has such a pyramid structure as to be expanded from a tip portion to a bottom surface (a surface on which a cantilever (1) is to be formed) and a semiconductor integrated circuit (12) is formed in a side surface of the conductive probe (2C). An amplifying circuit (12a) to be the semiconductor integrated circuit (12) amplifies an electrical characteristic signal given from the conductive probe (2C) to send the electrical characteristic signal to a signal processor (10) through a conductive cantilever (1C) and a signal cable (9) (FIG. 1).
    Type: Application
    Filed: April 1, 2002
    Publication date: February 6, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Yukari Imai, Hitoshi Maeda, Mari Tsugami, Yoji Mashiko
  • Patent number: 5162233
    Abstract: A method of detecting and analyzing impurities wherein a substrate is cleaned by heating it under vacuum, a liquid sample is dropped on a surface of the substrate under vacuum which vacuum is less than that of the previous step, the liquid sample which has thus been dropped on the substrate is dried by reducing the pressure of the atmosphere surrounding the substrate, and impurities contained in the liquid sample are detected and analyzed by examining the surface of the substrate. Thus, this method is adapted to minimize the risk of any foreign matter becoming mixed with the sample liquid, to thus ensure a high level of precision in the detection and analysis of impurities.
    Type: Grant
    Filed: February 9, 1988
    Date of Patent: November 10, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Junko Komori, Yoji Mashiko
  • Patent number: 5130273
    Abstract: A read only memory device comprises a first electrode, and a second electrode arranged overlapping with the first electrode so as to be geometrically in connection at the intersection. At least one of the first and second electrodes is formed of a ceramics system high temperature superconductor. A prescribed electrode out of said electrodes which is formed of the high temperature superconductor has a high resistance region for insulating the first and second electrodes from each other at the intersection corresponding to a prescribed stored data.In the manufacturing method, the first and second electrodes are formed and, thereafter, a high resistance region is formed by irradiating focused ion beam.
    Type: Grant
    Filed: January 7, 1991
    Date of Patent: July 14, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoji Mashiko, Tadashi Nishioka
  • Patent number: 5112771
    Abstract: A semiconductor device having a trench (30) comprises a semiconductor substrate (11), a plurality of elements (13) provided on the semiconductor substrate, a trench (30) provided between the elements and an insulating material (12) embedded in the trench for isolating the elements. The trench has its bottom portion region enlarged in both sides.The semiconductor device is manufactured by enlarging the bottom portion region of the trench by etching.
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: May 12, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tatsuya Ishii, Yoji Mashiko, Masao Nagatomo, Michihiro Yamada
  • Patent number: 5043290
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: August 27, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4990489
    Abstract: A read only memory device includes a first electrode and a second electrode arranged in an overlapping relation with the first electrode so as to be geometrically in connection at an intersection therewith corresponding to a storage location for one type of data. At least one of the first and second electrodes is formed of a ceramics system high temperature superconductor. A prescribed one of the two electrodes which is formed of the high temperature superconductor has a high resistance region for insulating the first and second electrodes from each other at an intersection corresponding to a storage location for another type of stored data. The high resistance region is formed by irradiating an intersection with a focused ion beam.
    Type: Grant
    Filed: July 6, 1988
    Date of Patent: February 5, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoji Mashiko, Tadashi Nishioka
  • Patent number: 4962059
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: October 9, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4948749
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connectig the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: August 14, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4853341
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process including the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed in greatly reduced.
    Type: Grant
    Filed: November 9, 1987
    Date of Patent: August 1, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4843238
    Abstract: In a method for identifying blistered film in layered films, a focused ion beam irradiates the approximate center of the blister and a portion which has no blister, and individual sets of the measurement data relating to the respective numbers of secondary electrons generated by the irradiation are compared to determine which film of layered films has blistered. Since the focused ion beam is employed, the present method is applicable to the detection of a small blister in layered films. Furthermore, since an enormous number of cutting operations as might have been required in the prior art are eliminated, the present method can be carried out, stably, positively and economically.
    Type: Grant
    Filed: February 11, 1988
    Date of Patent: June 27, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Hiroaki Morimoto, Yoji Mashiko, Hiroshi Koyama
  • Patent number: 4723062
    Abstract: In order to cut a portion of an aluminum interconnection in an aluminum circuit to be disconnected, the aluminum interconnection portion in the region to be cut is covered with a hydrogen-containing silicon nitride film by plasma CVD and is then irradiated with laser beams in an operating sequence consisting of three steps: the first step with relatively low power intensity and long irradiation time duration, the second step with intermediate power intensity and short irradiation time duration and the third step with relatively high power intensity and shortest irradiation time duration.
    Type: Grant
    Filed: June 15, 1987
    Date of Patent: February 2, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Hiroshi Koyama, Yoji Mashiko
  • Patent number: 4691078
    Abstract: In order to cut a portion of an aluminum interconnection to be disconnected in an aluminum circuit, the aluminum interconnection portion in the region to be cut is covered with a hydrogen-containing silicon nitride film by plasma CVD and is then irradiated with laser beams in an operating sequence consisting of three steps: the first step with relatively low power intensity and long irradiation time duration, the second step with intermediate power intensity and short irradiation time duration and the third step with relatively high power intensity and shortest irradiation time duration.
    Type: Grant
    Filed: January 21, 1986
    Date of Patent: September 1, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Hiroshi Koyama, Yoji Mashiko
  • Patent number: 4636400
    Abstract: A method of treating a silicon nitride film formed by plasma deposition and deposited on a substrate, which comprises: (1) irradiating the silicon nitride film, and (2) heating the silicon nitride film during the irradiating.
    Type: Grant
    Filed: September 9, 1985
    Date of Patent: January 13, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Hiroshi Koyama, Yoji Mashiko
  • Patent number: 4414242
    Abstract: A process for producing a semiconductor device includes the step of locally heating and fusing an island of a polycrystalline or amorphous semiconductor layer which is formed on and surrounded by an insulator. In the process, at least one ridge is formed on the underlying insulator before the formation of the semiconductor layer.
    Type: Grant
    Filed: November 24, 1982
    Date of Patent: November 8, 1983
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishimura, Yoji Mashiko
  • Patent number: 4377734
    Abstract: Ions of a metal which becomes passive under the presence of oxygen with regard to plasma etching are implanted into selected portions of the surface of a workpiece, after which the workpiece is subjected to plasma etching with a reaction gas mixed with oxygen, whereby that layer which has been rendered passive acts as a mask, and an etched pattern is formed.
    Type: Grant
    Filed: October 9, 1980
    Date of Patent: March 22, 1983
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoji Mashiko, Hirozo Takano, Haruhiko Abe, Sotoju Asai, Kazuo Mizuguchi, Sumio Nomoto
  • Patent number: 4314874
    Abstract: A thin aluminum film 3 is formed on the top surface of a substrate 2, 1. Selected areas of the aluminum film are irradiated by an oxygen ion beam 6 to form implanted regions 7. The surface is then plasma etched, with the oxygen ion implanted regions serving as a mask to thereby prevent the removal of the underlying areas of the aluminum film.
    Type: Grant
    Filed: September 24, 1980
    Date of Patent: February 9, 1982
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Haruhiko Abe, Yoji Mashiko, Hiroshi Harada, Sotoju Asai, Kazuo Mizuguchi, Sumio Nomoto