Patents by Inventor Yoji Murao
Yoji Murao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11480604Abstract: A high-frequency 5 measurement method includes generating a test signal (TS), which is a sine-wave signal having a predetermined frequency, in which a period (?) during which the power level is at a first power level and a period (T-?) during which the power level is at a second power level lower than the first power level 10 are periodically repeated, inputting the test signal (TS) to a device under test (10) as an input signal, and measuring the difference between an output signal (OUT) of the device under test (10) and an ideal value of the output signal (OUT).Type: GrantFiled: November 20, 2017Date of Patent: October 25, 2022Assignee: NEC CORPORATIONInventor: Yoji Murao
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Publication number: 20190369158Abstract: With a conventional high-frequency measurement method, it is difficult to accurately grasp variation in high-frequency performance when a high-frequency signal is input to an amplifier. One aspect of a high-frequency measurement method according to the present invention includes generating a test signal (TS), which is a sine-wave signal having a predetermined frequency, in which a period (?) during which the power level is at a first power level and a period (T-?) during which the power level is at a second power level lower than the first power level are periodically repeated, inputting the test signal (TS) to a device under test (10) as an input signal, and measuring the difference between an output signal (OUT) of the device under test (10) and an ideal value of the output signal (OUT).Type: ApplicationFiled: November 20, 2017Publication date: December 5, 2019Applicant: NEC CORPORATIONInventor: Yoji MURAO
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Patent number: 10361693Abstract: A power source supply circuit includes: a plurality of power sources (11-1, 11-2) that generate power source voltages different from each other; a switch circuit (14) that switches and outputs the power source voltages generated in the plurality of power sources (11-1, 11-2); a voltage output terminal (16) that outputs outside the power source voltages output from the switch circuit (14); an RF choke circuit (15) provided between the switch circuit (14) and the voltage output terminal (16), the RF choke circuit (15) including a first capacitor; and a second capacitor (12-1, 12-2) provided between the plurality of power sources (11-1, 11-2) and the switch circuit (14), the second capacitor (12-1, 12-2) having a larger capacitance than the first capacitor.Type: GrantFiled: January 5, 2016Date of Patent: July 23, 2019Assignee: NEC CORPORATIONInventors: Yoji Murao, Kazumi Shiikuma
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Patent number: 10096882Abstract: A duplexer according to the present invention includes a transmission-side terminal, a reception-side terminal, a common terminal, a transmission-side circuit unit, and a reception-side circuit unit. Here, the transmission-side circuit unit is connected between the transmission-side terminal and the common terminal. The reception-side circuit unit is connected between the common terminal and the reception-side terminal. The transmission-side circuit unit includes a first transmission-side filter, a second transmission-side filter, and a transmission-side directional propagation circuit. Here, the first transmission-side filter is provided in the subsequent stage of the transmission-side terminal. The second transmission-side filter is provided in a stage subsequent to the first transmission-side filter. The transmission-side directional propagation circuit is connected between the first transmission-side filter and the second transmission-side filter.Type: GrantFiled: February 28, 2014Date of Patent: October 9, 2018Assignee: NEC CorporationInventor: Yoji Murao
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Publication number: 20180026619Abstract: A power source supply circuit includes: a plurality of power sources (11-1, 11-2) that generate power source voltages different from each other; a switch circuit (14) that switches and outputs the power source voltages generated in the plurality of power sources (11-1, 11-2); a voltage output terminal (16) that outputs outside the power source voltages output from the switch circuit (14); an RF choke circuit (15) provided between the switch circuit (14) and the voltage output terminal (16), the RF choke circuit (15) including a first capacitor; and a second capacitor (12-1, 12-2) provided between the plurality of power sources (11-1, 11-2) and the switch circuit (14), the second capacitor (12-1, 12-2) having a larger capacitance than the first capacitor.Type: ApplicationFiled: January 5, 2016Publication date: January 25, 2018Applicant: NEC CorporationInventors: Yoji MURAO, Kazumi SHIIKUMA
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Patent number: 9438173Abstract: A multiple-series amplifying device (100) of the present invention includes multiple series of amplifiers (110, 120) which are formed in parallel so as to input and output signals individually. Each of multiple-series of amplifiers (110, 120) includes a plurality of semiconductor amplifying elements (111, 112, 121, 122) which are driven in parallel so as to amplify signals. A pair of semiconductor amplifying elements (112, 121) adjoining together in a pair of amplifiers (110, 120) is formed in a single package (130).Type: GrantFiled: May 29, 2012Date of Patent: September 6, 2016Assignee: NEC CorporationInventor: Yoji Murao
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Publication number: 20160028143Abstract: A duplexer according to the present invention includes a transmission-side terminal, a reception-side terminal, a common terminal, a transmission-side circuit unit, and a reception-side circuit unit. Here, the transmission-side circuit unit is connected between the transmission-side terminal and the common terminal. The reception-side circuit unit is connected between the common terminal and the reception-side terminal. The transmission-side circuit unit includes a first transmission-side filter, a second transmission-side filter, and a transmission-side directional propagation circuit. Here, the first transmission-side filter is provided in the subsequent stage of the transmission-side terminal. The second transmission-side filter is provided in a stage subsequent to the first transmission-side filter. The transmission-side directional propagation circuit is connected between the first transmission-side filter and the second transmission-side filter.Type: ApplicationFiled: February 28, 2014Publication date: January 28, 2016Applicant: NEC CORPORATIONInventor: Yoji MURAO
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Publication number: 20150303879Abstract: A multiple-series amplifying device (100) of the present invention includes multiple series of amplifiers (110, 120) which are formed in parallel so as to input and output signals individually. Each of multiple-series of amplifiers (110, 120) includes a plurality of semiconductor amplifying elements (111, 112, 121, 122) which are driven in parallel so as to amplify signals. A pair of semiconductor amplifying elements (112, 121) adjoining together in a pair of amplifiers (110, 120) is formed in a single package (130).Type: ApplicationFiled: May 29, 2012Publication date: October 22, 2015Applicant: NEC CorporationInventor: Yoji MURAO
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Patent number: 8736375Abstract: A Doherty amplifier has a distributor for branching an input signal into two signals, a carrier amplifier to which one of the signals is inputted from the distributor, a peak amplifier to which another signal of the signals is inputted from the distributor, and a synthesizer for synthesizing output signals from the carrier amplifier and the peak amplifier. The carrier amplifier has a compound semiconductor device with at least two terminals. The peak amplifier has a single element semiconductor device. Bias voltages having the same polarity are applied to the two terminals of the compound semiconductor device.Type: GrantFiled: September 27, 2010Date of Patent: May 27, 2014Assignee: NEC CorporationInventor: Yoji Murao
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Patent number: 8698563Abstract: A Doherty amplifier has a distributor for branching an input signal into two signals, a carrier amplifier to which one of the signals is inputted from the distributor, a peak amplifier to which another signal of the signals is inputted from the distributor, and a synthesizer for synthesizing output signals from the carrier amplifier and the peak amplifier. The carrier amplifier has a compound semiconductor device with at least two terminals. The peak amplifier has a single element semiconductor device. Bias voltages having the same polarity are applied to the two terminals of the compound semiconductor device.Type: GrantFiled: September 27, 2010Date of Patent: April 15, 2014Assignee: NEC CorporationInventor: Yoji Murao
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Patent number: 8519787Abstract: Provided is a high frequency amplifier that can suppress from increasing the circuit size while improving efficiency at the time of low output. A high frequency amplifier according to one aspect of the present invention includes a carrier amplifier 7 that amplifies an input signal, a peak amplifier 8 that amplifies the input signal with a predetermined amplitude or greater among the input signal, an envelope detector 3 that extracts envelope information of the input signal, and a bias control circuit 4 that calculates a calculation voltage to be supplied to the carrier amplifier 7 according to the envelope information, compares the calculation voltage and a threshold, and changes the calculation voltage to be supplied to the carrier amplifier 7.Type: GrantFiled: December 3, 2009Date of Patent: August 27, 2013Assignee: NEC CorporationInventor: Yoji Murao
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Publication number: 20120146732Abstract: A Doherty amplifier has a distributor for branching an input signal into two signals, a carrier amplifier to which one of the signals is inputted from the distributor, a peak amplifier to which another signal of the signals is inputted from the distributor, and a synthesizer for synthesizing output signals from the carrier amplifier and the peak amplifier. The carrier amplifier has a compound semiconductor device with at least two terminals. The peak amplifier has a single element semiconductor device. Bias voltages having the same polarity are applied to the two terminals of the compound semiconductor device.Type: ApplicationFiled: September 27, 2010Publication date: June 14, 2012Applicant: NEC CORPORATIONInventor: Yoji Murao
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Publication number: 20110285460Abstract: Provided is a high frequency amplifier that can suppress from increasing the circuit size while improving efficiency at the time of low output. A high frequency amplifier according to one aspect of the present invention includes a carrier amplifier 7 that amplifies an input signal, a peak amplifier 8 that amplifies the input signal with a predetermined amplitude or greater among the input signal, an envelope detector 3 that extracts envelope information of the input signal, and a bias control circuit 4 that calculates a calculation voltage to be supplied to the carrier amplifier 7 according to the envelope information, compares the calculation voltage and a threshold, and changes the calculation voltage to be supplied to the carrier amplifier 7.Type: ApplicationFiled: December 3, 2009Publication date: November 24, 2011Inventor: Yoji Murao
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Patent number: 7602243Abstract: An object of the present invention is, in a high-frequency amplifier using a semiconductor device as an amplifying device, to achieve a high efficiency by controlling input/output matching circuits so that they are always optimized, when a bias voltage applied to the semiconductor device is controlled to correspond to an envelope of a signal. The bias voltage that is applied to the semiconductor device for amplification is changed to corresponding to the envelope of the signal using a bias control circuit, control voltages for controlling impedance of input/output matching circuits are created from the bias voltage, and the bias voltage and the control voltages that are used to control the impedance of the input/output matching circuits of semiconductor device 7 are supplied in synchronization with each other. Accordingly, the impedance of the input/output matching circuits is variably controlled so that the circuits always optimized manner, and thereby high efficiency amplification can be accomplished.Type: GrantFiled: October 30, 2007Date of Patent: October 13, 2009Inventor: Yoji Murao
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Publication number: 20080278231Abstract: An object of the present invention is, in a high-frequency amplifier using a semiconductor device as an amplifying device, to achieve a high efficiency by controlling input/output matching circuits so that they are always optimized, when a bias voltage applied to the semiconductor device is controlled to correspond to an envelope of a signal. The bias voltage that is applied to the semiconductor device for amplification is changed to corresponding to the envelope of the signal using a bias control circuit, control voltages for controlling impedance of input/output matching circuits are created from the bias voltage, and the bias voltage and the control voltages that are used to control the impedance of the input/output matching circuits of semiconductor device 7 are supplied in synchronization with each other. Accordingly, the impedance of the input/output matching circuits is variably controlled so that the circuits always optimized manner, and thereby high efficiency amplification can be accomplished.Type: ApplicationFiled: October 30, 2007Publication date: November 13, 2008Inventor: Yoji Murao