Patents by Inventor Yoji Ueda

Yoji Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10676783
    Abstract: An analysis chip includes a substrate main body having a plurality of reaction portions in which a selective binding substance selectively binding to a substance to be examined is immobilized; a corner portion in which different straight lines or curved lines intersect with each other in a cross section in which a plane passing through a surface of the substrate main body on which the reaction portions are provided is a cut surface; a partition portion formed by applying water repellent treatment to the surface of the substrate main body on which the reaction portions are provided, the partition portion being configured to partition the reaction portions inside an outer edge formed by the surface, and a connection portion having water repellency, the connection portion being configured to connect between a part of the partition portion and the corner portion.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: June 9, 2020
    Assignee: Toray Industries, Inc.
    Inventors: Hiroki Otsuka, Yoji Ueda
  • Patent number: 10642196
    Abstract: A cleaning device has a housing where an opening and a toner storage portion are formed, a cleaning member arranged in the opening, a collection roller collecting toner attached to the cleaning member, a blade scraping off toner attached to the collection roller, a sheet member dividing between the toner storage portion and the opening, and a sealing member arranged to be in contact with the housing and both end parts of the outer circumferential surface of the collection roller in the axial direction. A first region having a predetermined surface roughness is formed in a middle part of the circumferential surface of the collection roller in the axial direction, and a second region having a lower surface roughness than the first region is formed next to both end parts of the first region in the axial direction.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: May 5, 2020
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Yoji Ueda, Yuji Kamiyama
  • Publication number: 20200057403
    Abstract: A cleaning device has a housing where an opening and a toner storage portion are formed, a cleaning member arranged in the opening, a collection roller collecting toner attached to the cleaning member, a blade scraping off toner attached to the collection roller, a sheet member dividing between the toner storage portion and the opening, and a sealing member arranged to be in contact with the housing and both end parts of the outer circumferential surface of the collection roller in the axial direction. A first region having a predetermined surface roughness is formed in a middle part of the circumferential surface of the collection roller in the axial direction, and a second region having a lower surface roughness than the first region is formed next to both end parts of the first region in the axial direction.
    Type: Application
    Filed: June 25, 2019
    Publication date: February 20, 2020
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Yoji UEDA, Yuji KAMIYAMA
  • Patent number: 10443085
    Abstract: Disclosed is a method for detecting a nucleic acid using a substance that suppresses, in the labeling step of the post-staining method, detachment of a target nucleic acid that has once hybridized with a capture probe immobilized on a support, which method enables detection of the target nucleic acid with a sensitivity equivalent to or higher than that achieved by a method using sodium ion even in cases where the substance is used at a lower concentration. The method for detecting a nucleic acid comprises the steps of: (1) hybridizing a capture probe with a target nucleic acid to form a double-stranded nucleic acid; bringing the formed double-stranded nucleic acid into contact with a solution containing a labeling substance and a divalent metal cation at a concentration of not less than 10 mM to introduce the labeling substance into the double-stranded nucleic acid; and detecting the labeling substance introduced into the double-stranded nucleic acid.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 15, 2019
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Fumio Nakamura, Yoji Ueda, Takafumi Arike
  • Publication number: 20180087100
    Abstract: An analysis chip includes a substrate main body having a plurality of reaction portions in which a selective binding substance selectively binding to a substance to be examined is immobilized; a corner portion in which different straight lines or curved lines intersect with each other in a cross section in which a plane passing through a surface of the substrate main body on which the reaction portions are provided is a cut surface; a partition portion formed by applying water repellent treatment to the surface of the substrate main body on which the reaction portions are provided, the partition portion being configured to partition the reaction portions inside an outer edge formed by the surface, and a connection portion having water repellency, the connection portion being configured to connect between a part of the partition potion and the corner portion.
    Type: Application
    Filed: March 31, 2016
    Publication date: March 29, 2018
    Inventors: Hiroki Otsuka, Yoji Ueda
  • Patent number: 9416403
    Abstract: A method of detecting a target nucleic acid by sandwich hybridization using a detection probe that hybridizes with the target nucleic acid, and a capture probe immobilized on a support wherein at least one nucleic acid base in the nucleic acid molecule(s) of the detection probe and/or capture probe with a photoreactive group includes irradiating, with light, a complex formed by hybridization between the target nucleic acid and the detection probe and/or capture probe to allow formation of a covalent bond(s) between the photoreactive group(s) and a nucleic acid base(s) in the target nucleic acid.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: August 16, 2016
    Assignee: Toray Industries, Inc.
    Inventors: Taisuke Hirano, Fumio Nakamura, Yoji Ueda, Kenzo Fujimoto
  • Publication number: 20150322483
    Abstract: Disclosed is a method for detecting a nucleic acid using a substance that suppresses, in the labeling step of the post-staining method, detachment of a target nucleic acid that has once hybridized with a capture probe immobilized on a support, which method enables detection of the target nucleic acid with a sensitivity equivalent to or higher than that achieved by a method using sodium ion even in cases where the substance is used at a lower concentration. The method for detecting a nucleic acid comprises the steps of: (1) hybridizing a capture probe with a target nucleic acid to form a double-stranded nucleic acid; bringing the formed double-stranded nucleic acid into contact with a solution containing a labeling substance and a divalent metal cation at a concentration of not less than 10 mM to introduce the labeling substance into the double-stranded nucleic acid; and detecting the labeling substance introduced into the double-stranded nucleic acid.
    Type: Application
    Filed: June 19, 2013
    Publication date: November 12, 2015
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Fumio NAKAMURA, Yoji UEDA, Takafumi ARIKE
  • Publication number: 20150240296
    Abstract: A method of detecting a target nucleic acid by sandwich hybridization using a detection probe that hybridizes with the target nucleic acid, and a capture probe immobilized on a support wherein at least one nucleic acid base in the nucleic acid molecule(s) of the detection probe and/or capture probe with a photoreactive group includes irradiating, with light, a complex formed by hybridization between the target nucleic acid and the detection probe and/or capture probe to allow formation of a covalent bond(s) between the photoreactive group(s) and a nucleic acid base(s) in the target nucleic acid.
    Type: Application
    Filed: August 29, 2013
    Publication date: August 27, 2015
    Inventors: Taisuke Hirano, Fumio Nakamura, Yoji Ueda, Kenzo Fujimoto
  • Publication number: 20150045249
    Abstract: A method detects nucleic acid with high sensitivity even when the target nucleic acid is detected by sandwich hybridization using neither nucleic acid amplification nor a sensitization technique. The method includes sequentially or simultaneously bringing a target nucleic acid or fragmentation product thereof, a plurality of detection probes, and a capture probe immobilized on a support, into contact with each other to hybridize the capture probe with the target nucleic acid or fragmentation product thereof and to hybridize the target nucleic acid or fragmentation product thereof with the plurality of detection probes, thereby binding the plurality of detection probes to the support through the capture probe and the target nucleic acid or fragmentation product thereof; and then detecting the plurality of detection probes bound to the support.
    Type: Application
    Filed: February 27, 2013
    Publication date: February 12, 2015
    Inventors: Yoji Ueda, Fumio Nakamura
  • Patent number: 8867228
    Abstract: An electrode bonding structure sealed with a sealing resin, in which a flexible substrate is bonded to a first substrate via an adhesive, wherein: a region along a bottom face edge of an flexible substrate end part is bonded, via the adhesive, to an inner side region of a region along a top face edge of an first substrate end part; a gap is formed between an inner side region of the region along the bottom face edge of the flexible substrate end part and the region along the top face edge of the first substrate end part; the sealing resin is formed so as to enter, while covering a top face of the flexible substrate end part, at least a portion of the gap; and a height of the gap gets smaller towards the adhesive from the top face edge of the first substrate end part.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: October 21, 2014
    Assignee: Panasonic Corporation
    Inventors: Hiroaki Katsura, Koso Matsuno, Yoji Ueda
  • Publication number: 20120285731
    Abstract: An electrode bonding structure sealed with a sealing resin, in which a flexible substrate is bonded to a first substrate via an adhesive, wherein: a region along a bottom face edge of an flexible substrate end part is bonded, via the adhesive, to an inner side region of a region along a top face edge of an first substrate end part; a gap is formed between an inner side region of the region along the bottom face edge of the flexible substrate end part and the region along the top face edge of the first substrate end part; the sealing resin is formed so as to enter, while covering a top face of the flexible substrate end part, at least a portion of the gap; and a height of the gap gets smaller towards the adhesive from the top face edge of the first substrate end part.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 15, 2012
    Applicant: Panasonic Corporation
    Inventors: Hiroaki KATSURA, Koso Matsuno, Yoji Ueda
  • Publication number: 20090032285
    Abstract: A method of manufacturing a multilayered circuit board includes the steps of: manufacturing a laminated body by laminating a prepreg of a predetermined thickness on at least one surface of a double-sided circuit board having a grounding link and a signal wiring patterned on both surfaces thereof; and applying heat and pressure to the laminated body and completing a layered structure in which the signal wiring is laid inside the prepreg at a boundary between the double-sided circuit board and the prepreg, wherein prepreg sheets of a predetermined thickness are used in a completed layered structure so that a thickness of a prepreg of the double-sided circuit board is smaller than a distance between a surface of the prepreg on a side not opposed to the double-sided circuit board and the signal wiring laid inside the prepreg.
    Type: Application
    Filed: January 27, 2005
    Publication date: February 5, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoji Ueda, Susumu Matsuoka, Rikiya Okimoto, Shozo Ochi, Satoru Tomekawa
  • Patent number: 7423884
    Abstract: A multilayer circuit board includes: two or more layers of electrical insulative base members; and two or more layers of conductive patterned layers. At least two of the conductive patterned layers include coil patterns that will be a part of a coil, through holes are provided at predetermined positions of the electrical insulative base members, the positions being sandwiched between the coil patterns, so as to enable communication between respective end portions of the coil patterns, and conductive paste charged in the through holes allows electrical connection to be established between the respective end portions. The coil is formed so as to be wound in a direction perpendicular to a thickness direction of the multilayer circuit board. With this configuration, a multilayer circuit board can be provided, which facilitates increasing the winding number of a coil and has excellent flexibility of circuit design.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouhei Enchi, Yoji Ueda
  • Publication number: 20080185178
    Abstract: A circuit board of the present invention, includes: an electrical insulating layer including at least one layer of electrical insulating base; and a conductive portion formed in a via hole provided in the electrical insulating base. A land for mounting only is disposed on at least one surface of the electrical insulating base that is arranged at an outermost layer. According to a method for manufacturing a circuit board of the present invention, includes the steps of: forming a via hole in an electrical insulating base; filling the via hole with a conductive paste; laminating a metal foil or a releasing sheet on the electrical insulating base, and placing a jig for pressing above and below the lamination, followed by hot-pressing so as to apply heat and pressure thereto, so as to form a conductive portion made of the conductive paste in the via hole; and forming a land for mounting only on at least one surface of the electrical insulating base that is arranged at an outermost layer.
    Type: Application
    Filed: January 29, 2008
    Publication date: August 7, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Rikiya Okimoto, Yoji Ueda, Satoru Tomekawa, Tousaku Nishiyama, Shozo Ochi
  • Publication number: 20080186045
    Abstract: An inspection mark structure has an inspection via hole, which is provided in substrate sheets to be heat-pressed constituting at least two layers of laminates; a round pattern electrode, which is formed on one main face side of the substrate sheet provided with the inspection via hole, and provided around the end face of the inspection via hole at such a predetermined distance as not to come into contact with the end face; and a conduction electrode, which is formed on the other main face side of the substrate sheet provided with the inspection via hole, and provided so as to be electrically connected with the end face of the inspection via hole.
    Type: Application
    Filed: January 31, 2008
    Publication date: August 7, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoji UEDA, Tsukasa SHIRAISHI, Yositake HAYASHI, Rikiya OKIMOTO
  • Patent number: 7155820
    Abstract: The present invention provides a method of manufacturing a printed circuit board, which includes preparing a dielectric substrate, coating surfaces of the dielectric substrate, filling a via hole with a conductor, peeling mold-releasing films, compressing the dielectric substrate and forming metal foils. The dielectric substrate has patterned wiring layers on both surfaces, and the wiring layers are connected electrically with each other by the conductor. The dielectric substrate is made of a glass cloth or a glass nonwoven fabric impregnated with a thermosetting epoxy resin mixed with fine particles, and the conductive filler in the conductor has an average particle diameter larger than that of the fine particles. Accordingly, the printed circuit board has an improved moisture resistance as a whole and also excellent connection reliability and repair resistance. In addition, the dielectric substrate of the printed circuit board has an improved mechanical strength such as flexural rigidity.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: January 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizo Andoh, Fumio Echigo, Tadashi Nakamura, Yasuhiro Nakatani, Yoji Ueda, Tousaku Nishiyama, Shozo Ochi
  • Publication number: 20060081397
    Abstract: A multilayer circuit board includes: two or more layers of electrical insulative base members; and two or more layers of conductive patterned layers. At least two of the conductive patterned layers include coil patterns that will be a part of a coil, through holes are provided at predetermined positions of the electrical insulative base members, the positions being sandwiched between the coil patterns, so as to enable communication between respective end portions of the coil patterns, and conductive paste charged in the through holes allows electrical connection to be established between the respective end portions. The coil is formed so as to be wound in a direction perpendicular to a thickness direction of the multilayer circuit board. With this configuration, a multilayer circuit board can be provided, which facilitates increasing the winding number of a coil and has excellent flexibility of circuit design.
    Type: Application
    Filed: March 14, 2005
    Publication date: April 20, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouhei Enchi, Yoji Ueda
  • Publication number: 20050124197
    Abstract: A circuit board of the present invention, includes: an electrical insulating layer including at least one layer of electrical insulating base; and a conductive portion formed in a via hole provided in the electrical insulating base. A land for mounting only is disposed on at least one surface of the electrical insulating base that is arranged at an outermost layer. According to a method for manufacturing a circuit board of the present invention, includes the steps of: forming a via hole in an electrical insulating base; filling the via hole with a conductive paste; laminating a metal foil or a releasing sheet on the electrical insulating base, and placing a jig for pressing above and below the lamination, followed by hot-pressing so as to apply heat and pressure thereto, so as to form a conductive portion made of the conductive paste in the via hole; and forming a land for mounting only on at least one surface of the electrical insulating base that is arranged at an outermost layer.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 9, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Rikiya Okimoto, Yoji Ueda, Satoru Tomekawa, Tousaku Nishiyama, Shozo Ochi
  • Publication number: 20050016764
    Abstract: There is provided a wiring substrate for intermediate connection comprising: (1) a wiring board having a plurality of wiring layers which are connected through a via hole conductor(s) with each other; and (2) a prepreg sheet having a via hole conductor(s) at a predetermined position(s) which sheet is disposed on at least one side of the wiring board.
    Type: Application
    Filed: July 23, 2004
    Publication date: January 27, 2005
    Inventors: Fumio Echigo, Kumiko Hirayama, Yoji Ueda, Yasuhiro Nakatani
  • Publication number: 20040214006
    Abstract: A member for a circuit board according to the present invention includes a prepreg and a mold release film that is provided on at lease one side of the prepreg. The mold release film contains or is coated with a heat absorbing substance having a heat absorbing property. A method of manufacturing a member for a circuit board according to the present invention includes allowing a mold release film to adhere to at least one side of a prepreg by heating and pressing. The mold release film contains or is coated with a heat absorbing substance having a heat absorbing property. In the method, the heating is performed at a temperature not lower than a softening point of the prepreg and not higher than an endothermic temperature of the heat absorbing substance.
    Type: Application
    Filed: April 12, 2004
    Publication date: October 28, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kumiko Hirayama, Fumio Echigo, Izuru Nakai, Yoji Ueda