Abstract: Design data including circuit data on a test point and information about a test mode, which has been attached to the test point, is inputted to an apparatus for designing a semiconductor integrated circuit. A design data code analysis unit in a data input unit performs the code analysis of the design data and, after the code analysis, the resulting design data is stored by a database storage unit in a storage device. A test point deletion unit receives the test mode specified from the outside and deletes data on an unnecessary test point from the design data stored in the storage device. The design data which does not include the unnecessary test point is outputted from a data output unit. Accordingly, even when the test mode is changed, there is no need to calculate the test efficiency again in response to each change or add the step of inserting a new test point.

Abstract: A method for inserting a test point to enable fault detection comprises the steps of: (a) determining whether or not a value-fixed node needs value fixation; (b) determining that an observation test point is to be inserted to a node which is disabled by the node determined to need value fixation; (c) comparing a test efficiency achieved when a control test point is inserted to the node which is determined to need no value fixation and a test efficiency achieved when an observation test point is inserted to a node which is disabled by the node determined to need no value fixation; and (d) selecting one of the control test point and the observation test point which achieves the higher test efficiency based on the comparison result and determining a node to which the selected test point is to be inserted.