Patents by Inventor Yomiyuki Yama

Yomiyuki Yama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5731631
    Abstract: A semiconductor device having improved heat dissipation property and electrical characteristics and applicable to an integrated circuit having a multiplicity of electrodes, and a method of fabricating the semiconductor device are disclosed. A surface of a semiconductor chip (1) on which a bump (2) is formed is in face to face relation to a surface of a circuit substrate (3) on which a land (5) is formed. A polyimide tape (6) and a TAB lead (7) constitute a TAB tape. The bump (2) and the land (5) are electrically connected to each other through the flat TAB tape. The land (5) is electrically connected to an external connection electrode (4) through an interconnecting line within the circuit substrate (3). The TAB lead (7) extending from the bump (2) to the land (5) is reduced in length, and the signal through the TAB lead (7) accordingly has improved electrical characteristics.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: March 24, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yomiyuki Yama, Masao Kobayashi, Jun Shibata, Shinji Baba, Masaki Watanabe
  • Patent number: 5701033
    Abstract: A semiconductor device comprising a substrate having a hollow cavity for mounting a semiconductor element therein and a lowered step surface at a periphery of the cavity for mounting a chip component thereon. A semiconductor element is mounted within the cavity and a chip capacitor is mounted to the lowered step surface. The semiconductor element and the chip component are adapted to be connected to an external circuit through electrical conductors. A cap is attached to the substrate and a seal material is filled into a space defined between the cap and the substrate for sealing the cavity and for encapsulating the chip component on the lowered step surface which may extend along the entire periphery of the cavity. The cap may include a projection adapted to abut gainst a side wall of the lowered step surface, or alternatively, the lowered step surface may include a side wall having a projection adapted to abut against periphery of the cap.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: December 23, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tetsuya Ueda, Jun Shibata, Yomiyuki Yama
  • Patent number: 5217910
    Abstract: First, a low-concentration impurity layer is formed by obliquely implanting an n-type impurity at a prescribed angle with respect to the surface of a p-type semiconductor substrate, using a gate electrode formed on the semiconductor substrate as a mask. Thereafter a sidewall spacer is formed on the sidewall of the gate electrode, and then a medium-concentration impurity layer is formed by obliquely implanting an n-type impurity to the surface of the semiconductor substrate. Thereafter a high-concentration impurity layer is formed by substantially perpendicularly implanting an n-type impurity with respect to the surface of the semiconductor substrate. According to this method, the low-concentration impurity layer in source and drain regions having triple diffusion structures can be accurately overlapped with the gate electrode, with no requirement for heat treatment for thermal diffusion.
    Type: Grant
    Filed: October 24, 1991
    Date of Patent: June 8, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masahiro Shimizu, Katsuyoshi Mitsui, Yomiyuki Yama, Masatoshi Yasunaga
  • Patent number: 5150180
    Abstract: A packaged semiconductor device includes a semiconductor element for receiving light, a semiconductor package containing the semiconductor element and including leads, optical glass sealing the semiconductor package and protecting the semiconductor element, the optical glass transmitting light and including an element that absorbs high energy radiation. Therefore, radiation such as gamma rays is absorbed by the anti-radiation glass and deterioration of the internal semiconductor element is prevented. A metal frame including a heavy metal radiation shield is provided at the periphery of the antiradiation glass. Thus, scattering of light in the semiconductor package is prevented and the positional deviation of the anti-radiation glass in the semiconductor package is prevented.
    Type: Grant
    Filed: April 24, 1991
    Date of Patent: September 22, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yomiyuki Yama
  • Patent number: 5091772
    Abstract: A package body for accommodating a semiconductor chip includes a plurality of inner-electrodes disposed on the package body and arranged in a multiplicity of rows around the semiconductor chip and outer-electrodes in the package body electrically connected to the corresponding inner-electrodes. The package body includes support sections disposed on the package body between the rows of inner-electrodes for supporting metal wires which connect the inner-electrodes to the electrodes of the semiconductor chip. A conductive layer for diminishing the floating capacitance between the metal wires may be included in the support sections.
    Type: Grant
    Filed: September 11, 1989
    Date of Patent: February 25, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masanobu Kohara, Takashi Kondo, Yomiyuki Yama
  • Patent number: 5075240
    Abstract: A conductive resist film is used as a mask in ion implantation. A portion of the conductive resist film is electrically connected to a semiconductor substrate. The charge of ions which enter the conductive resist film in ion implantation flows into the semiconductor substrate and dissipates therein.
    Type: Grant
    Filed: April 17, 1990
    Date of Patent: December 24, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yomiyuki Yama, Masatoshi Yasunaga, Katsuyoshi Mitsui, Ikuo Ogoh