Patents by Inventor Yonag-Yan Lu

Yonag-Yan Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9941368
    Abstract: Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: April 10, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yonag-Yan Lu, Hou-Yu Chen, Shyh-Horng Yang
  • Publication number: 20170084709
    Abstract: Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.
    Type: Application
    Filed: December 1, 2016
    Publication date: March 23, 2017
    Inventors: Yonag-Yan Lu, Hou-Yu Chen, Shyh-Horng Yang
  • Patent number: 9515167
    Abstract: Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: December 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yonag-Yan Lu, Hou-Yu Chen, Shyh-Horng Yang
  • Publication number: 20160013297
    Abstract: Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.
    Type: Application
    Filed: September 25, 2015
    Publication date: January 14, 2016
    Inventors: Yonag-Yan Lu, Hou-Yu Chen, Shyh-Horng Yang