Patents by Inventor Yong Ai Ong

Yong Ai Ong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11811180
    Abstract: Provided herein are semiconductor packages with improved electrical contacts (e.g. pins). In some embodiments, an assembly may include a substrate and an electrical contact coupled to the substrate, the electrical contact consisting of a first component defined by a complex 3D designed receiving pin. The electrical contact may further include a second component defined by another complex 3D designed penetrating pin, wherein the first component engages the second component to deform mechanically and to weld when the first component and the second component are coupled together.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: November 7, 2023
    Assignee: IXYS Semiconductor GmbH
    Inventors: Yong Ai-Ong, Thomas Spann
  • Patent number: 11652015
    Abstract: Provided herein are semiconductor packages with improved clamps. In some embodiments, a semiconductor package may include a housing having a wall extending from a main body, and a set of support walls extending from the wall. The semiconductor package may further include a clamp extending between the set of support walls, the clamp having a first planar section coupled to a first support wall of the set of support walls, a second planar section coupled to a second support wall of the set of support walls, and a third planar section between the first and second planar sections. The third planar section may include an opening operable to receive a fastener, and a plurality of stress relief openings.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: May 16, 2023
    Assignee: Littelfuse Semiconductor (Wuxi) Co., Ltd.
    Inventors: Yong Ai Ong, Chuyao Tai
  • Publication number: 20220085525
    Abstract: Provided herein are semiconductor packages with improved electrical contacts (e.g. pins). In some embodiments, an assembly may include a substrate and an electrical contact coupled to the substrate, the electrical contact consisting of a first component defined by a complex 3D designed receiving pin. The electrical contact may further include a second component defined by another complex 3D designed penetrating pin, wherein the first component engages the second component to deform mechanically and to weld when the first component and the second component are coupled together.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 17, 2022
    Applicant: IXYS Semiconductor GmbH
    Inventors: Yong Ai-Ong, Thomas Spann
  • Publication number: 20210265229
    Abstract: Provided herein are semiconductor packages with improved clamps. In some embodiments, a semiconductor package may include a housing having a wall extending from a main body, and a set of support walls extending from the wall. The semiconductor package may further include a clamp extending between the set of support walls, the clamp having a first planar section coupled to a first support wall of the set of support walls, a second planar section coupled to a second support wall of the set of support walls, and a third planar section between the first and second planar sections. The third planar section may include an opening operable to receive a fastener, and a plurality of stress relief openings.
    Type: Application
    Filed: February 23, 2021
    Publication date: August 26, 2021
    Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.
    Inventors: Yong Ai Ong, Chuyao Tai