Abstract: The present invention relates to novel mesylate salt of N-(5-(4-(4-((dimethylamino)methyl)-3-phenyl-1H-pyrazol-1-yl)pyrimidine-2-ylamino)-4-methoxy-2-morpholinophenyl)acrylamide, a novel crystalline form thereof, and a process for preparing the same. More specifically, the present invention relates to mesylate salt of N-(5-(4-(4-((dimethylamino)methyl)-3-phenyl-1H-pyrazol-1-yl)pyrimidine-2-ylamino)-4-methoxy-2-morpholinophenyl)acrylamide, which is excellent in stability, solubility, and bioavailability when it is administered not only alone but also in combination with other drugs and which has a high purity, a crystalline form thereof, and a process for preparing the same.

Abstract: A quantum dot including a core comprising a first semiconductor nanocrystal including a zinc chalcogenide and a semiconductor nanocrystal shell disposed on the surface of the core and comprising zinc, selenium, and sulfur. The quantum dot does not comprise cadmium, emits blue light, and may exhibit a digital diffraction pattern obtained by a Fast Fourier Transform of a transmission electron microscopic image including a (100) facet of a zinc blende structure. In an X-ray diffraction spectrum of the quantum dot, a ratio of a defect peak area with respect to a peak area of a zinc blende crystal structure is less than about 0.8:1. A method of producing the quantum dot, and an electroluminescent device including the quantum dot are also disclosed.

Abstract: A light emitting display device including a first pixel including a first driving transistor, a first input transistor, a first initialization transistor, a first storage capacitor, and a first light emitting diode (LED); and a second pixel including a second driving transistor, a second input transistor, a second initialization transistor, a second storage capacitor, and a second light emitting diode (LED. The first pixel further includes a first gate electrode connecting member connecting a first gate electrode of the first driving transistor and the first input transistor; the second pixel further includes a second gate electrode connecting member connecting a second gate electrode of the second driving transistor and the second input transistor; the first light emitting diode (LED) includes a first anode; the second light emitting diode (LED) includes a second anode; and the first gate electrode connecting member does not overlap the second anode in a plan view.

Abstract: According to an exemplary embodiment of the present disclosure, disclosed is an aluminum coated blank that includes a first coated steel sheet; a second coated steel sheet connected to the first coated steel sheet; and a joint portion that connects the first coated steel sheet to the second coated steel plate at a boundary between the first coated steel sheet and the second coated steel sheet.

Abstract: According to an exemplary embodiment of the present disclosure, disclosed is an aluminum coated blank that includes a first coated steel sheet; a second coated steel sheet connected to the first coated steel sheet; and a joint portion that connects the first coated steel sheet to the second coated steel plate at a boundary between the first coated steel sheet and the second coated steel sheet.

Abstract: A method of manufacturing a multilayer electronic component, the method includes, attaching a margin portion green sheet including a ceramic material, a photocuring agent, and a photoinitiator to at least one end surface of each of the plurality of cut ceramic green sheet stacked bodies in the third direction, an energy irradiation operation of irradiating, with energy, the margin portion green sheet to generate a photocuring polymerization reaction between the photocuring agent and the photoinitiator.

Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.

Abstract: According to an exemplary embodiment of the present disclosure, disclosed is an aluminum coated blank that includes a first coated steel sheet; a second coated steel sheet connected to the first coated steel sheet; and a joint portion that connects the first coated steel sheet to the second coated steel plate at a boundary between the first coated steel sheet and the second coated steel sheet.

Abstract: The present invention relates to a leveling agent and an electrolytic composition comprising the same. When the via hole in the substrate is filled with the electrolytic composition according to the present invention, the via hole can be filled within a relatively short time while minimizing the formation of dimples or voids.

Abstract: The present invention relates to a leveling agent and an electrolytic composition comprising the same. When the via hole in the substrate is filled with the electrolytic composition according to the present invention, the via hole can be filled within a relatively short time while minimizing the formation of dimples or voids.

Abstract: A cosmetic container having a wiper capable of removing a cosmetic liquid from an application support rod having a non-circular cross-sectional area is proposed. The cosmetic container includes a container (110) in which the cosmetic liquid is accommodated, a container cap (120) opened/closed with respect to an injection port (112) of the container (110), and an application part (130) rotatably fitted and coupled to the container cap. The wiper (140) is coupled to an inner side of the injection port (112) of the container, a through-hole (144) of the cleaner part (142) is formed in a circular shape, the application part includes an application support rod (132) and an application member (134), an airtight recessed groove (133) is formed on an upper portion of the application support rod, and the application support rod extended from a lower portion of the airtight recessed groove has a non-circular cross-sectional area.

Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.

Abstract: Disclosed herein are an apparatus and method for processing vehicle data security based on a cloud.

Abstract: A display device includes a scan driver to supply scan signals to first and second scan lines, a data driver to supply a data signal to data lines, a sensor connected to sensing lines, and pixels including a light-emitting element, a driving transistor to control an amount of current supplied to the light-emitting element in response to a voltage of a first node, a switching transistor between a j-th data line and the first node, and including a gate electrode coupled to an i-th first scan line, and a sensing transistor coupled between a second node, which is between the light-emitting element and the driving transistor, and a k-th sensing line, and including a gate electrode coupled to an i-th second scan line, and wherein the sensor is to sense deterioration information of the light-emitting element in a state in which the switching and sensing transistors are turned on.

Abstract: A multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, the capacitor body having first to sixth surfaces, the first internal electrode being exposed through the third, fifth, and sixth surfaces, and the second internal electrode being exposed through the fourth, fifth, and sixth surfaces, a first side portion and a second side portion, respectively disposed on the fifth surface and the sixth surface of the capacitor body, and a first external electrode and a second external electrode, respectively connected to the third surface and the fourth surface of the capacitor body to be respectively connected to the first internal electrode and the second internal electrode. The first and second side portions include an acicular second phase including a glass including aluminum (Al) and silicon (Si), manganese (Mn), and phosphorus (P).

Abstract: A memory device includes: a first memory cell mat that includes first multi-layer level sub word lines positioned over a substrate; a second memory cell mat that is laterally spaced apart from the first memory cell mat and includes second multi-layer level sub word lines; a first sub word line driver circuit that is positioned underneath the first memory cell mat; and a second sub word line driver circuit that is positioned underneath the second memory cell mat, wherein the first sub word line driver circuit is positioned underneath ends of the first multi-layer level sub word lines, and the second sub word line driver circuit is positioned underneath ends of the second multi-layer level sub word lines.

Abstract: A display apparatus includes a base substrate including a display region and a peripheral region that is a non-display region surrounding the display region, a plurality of data lines disposed in the display region on the base substrate and extending to the peripheral region, a bypass data line disposed in the display region and the peripheral region on the base substrate and electrically connected to at least one of the data lines, and a dummy pattern spaced apart from the bypass data line and disposed on a same layer as the bypass data line.

Abstract: A memory device is described. Generally, the device includes a string of memory transistors, a source select transistor coupled to a first end of the string of memory transistor and a drain select transistor coupled to a second end of the string of memory transistor. Each memory transistor includes a gate electrode formed adjacent to a charge trapping layer and there is neither a source nor a drain junction between adjacent pairs of memory transistors or between the memory transistors and source select transistor or drain select transistor. In one embodiment, the memory transistors are spaced apart from adjacent memory transistors and the source select transistor and drain select transistor, such that channels are formed therebetween based on a gate fringing effect associated with the memory transistors. Other embodiments are also described.

Abstract: The present invention relates to a bi-specific antibody that specifically binds to alpha-synuclein and IGF1R, and an use of the bi-specific antibody for the prevention, treatment and/or diagnosis of synucleinopathies associated with alpha-synuclein or alpha-synuclein aggregates, and can allow the alpha-synuclein antibody or an antigen-binding fragment thereof to penetrate the blood brain barrier to exert its action in the brain, and extend the half-life to maintain the efficacy for a long time.

Abstract: The present disclosure provides a method of forming a semiconductor device. The method includes: forming an interconnect structure over a substrate; forming a first gate structure and a second gate structure in a first layer of the interconnect structure; forming a first metal oxide layer and a second metal oxide layer in a second layer of the interconnect structure over the first gate structure and the second gate structure, respectively; forming an implant mask over the first metal oxide layer and the second metal oxide layer, the implant mask having different thicknesses corresponding to the first metal oxide layer and the second oxide layer; and performing an implantation operation on the first metal oxide layer and the second metal oxide layer.