Patents by Inventor Yong Chern Poh

Yong Chern Poh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11296000
    Abstract: An electronic circuit includes a first packaged semiconductor device having a first semiconductor die including a first terminal, a first electrically conductive lead that is electrically connected to the first terminal, and a first electrically insulating mold compound that encapsulates the first semiconductor die and exposes an end portion of the first lead at an outer surface of the first mold compound. A conductive track is formed in the outer surface of the first mold compound.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: April 5, 2022
    Assignee: Infineon Technologies AG
    Inventors: Cher Hau Danny Koh, Norliza Morban, Yong Chern Poh, Khay Chwan Saw, Si Hao Vincent Yeo
  • Publication number: 20200350222
    Abstract: An electronic circuit includes a first packaged semiconductor device having a first semiconductor die including a first terminal, a first electrically conductive lead that is electrically connected to the first terminal, and a first electrically insulating mold compound that encapsulates the first semiconductor die and exposes an end portion of the first lead at an outer surface of the first mold compound. A conductive track is formed in the outer surface of the first mold compound.
    Type: Application
    Filed: July 15, 2020
    Publication date: November 5, 2020
    Inventors: Cher Hau Danny Koh, Norliza Morban, Yong Chern Poh, Khay Chwan Saw, Si Hao Vincent Yeo
  • Patent number: 10741466
    Abstract: A first packaged semiconductor device is provided. The first packaged semiconductor device includes a first semiconductor die having a first terminal, a first electrically conductive lead that is electrically connected to the first terminal, and a first electrically insulating mold compound that encapsulates the first semiconductor die and exposes an end portion of the first lead at an outer surface of the first mold compound. A conductive track is formed in the outer surface of the first mold compound. Forming the conductive track includes activating a portion of the outer surface of the first mold compound for an electroless plating process, and performing the electroless plating process so as to form an electrically conductive material only within the activated portion of the outer surface of the first mold compound.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: August 11, 2020
    Assignee: Infineon Technologies AG
    Inventors: Cher Hau Danny Koh, Norliza Morban, Yong Chern Poh, Khay Chwan Saw, Si Hao Vincent Yeo
  • Patent number: 10325837
    Abstract: A semiconductor package includes a semiconductor die embedded in a molded package body, leads electrically connected to the die and protruding from a side face of the molded package body, and a recess extending inward from the side face and into a bottom main face of the molded package body to forma single groove. The recess begins below a region of the side face from which the leads protrude, so that this region of the side face is flat and each of the leads exits the molded package body in the same plane. A first subset of the leads is bent inward towards the molded package body and seated in the single groove, to form a first row of leads configured for surface mounting. A second subset of the leads extends outward from the molded package body, to form a second row of leads configured for surface mounting.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Cher Hau Danny Koh, Hai Sin Chong, Stefan Machiener, Yong Chern Poh, Toni Salminen, Khay Chwan Saw
  • Publication number: 20190157173
    Abstract: A first packaged semiconductor device is provided. The first packaged semiconductor device includes a first semiconductor die having a first terminal, a first electrically conductive lead that is electrically connected to the first terminal, and a first electrically insulating mold compound that encapsulates the first semiconductor die and exposes an end portion of the first lead at an outer surface of the first mold compound. A conductive track is formed in the outer surface of the first mold compound. Forming the conductive track includes activating a portion of the outer surface of the first mold compound for an electroless plating process, and performing the electroless plating process so as to form an electrically conductive material only within the activated portion of the outer surface of the first mold compound.
    Type: Application
    Filed: November 17, 2017
    Publication date: May 23, 2019
    Inventors: Cher Hau Danny Koh, Norliza Morban, Yong Chern Poh, Khay Chwan Saw, Si Hao Vincent Yeo
  • Publication number: 20190139869
    Abstract: A semiconductor package includes a semiconductor die embedded in a molded package body, leads electrically connected to the die and protruding from a side face of the molded package body, and a recess extending inward from the side face and into a bottom main face of the molded package body to form a single groove. The recess begins below a region of the side face from which the leads protrude, so that this region of the side face is flat and each of the leads exits the molded package body in the same plane. A first subset of the leads is bent inward towards the molded package body and seated in the single groove, to form a first row of leads configured for surface mounting. A second subset of the leads extends outward from the molded package body, to form a second row of leads configured for surface mounting.
    Type: Application
    Filed: November 7, 2017
    Publication date: May 9, 2019
    Inventors: Cher Hau Danny Koh, Hai Sin Chong, Stefan Macheiner, Yong Chern Poh, Toni Salminen, Khay Chwan Saw
  • Publication number: 20130154123
    Abstract: In various embodiments, a semiconductor device may include: a carrier; a semiconductor chip disposed over a first side of the carrier; a layer stack disposed between the carrier and the semiconductor chip or over a second side of the carrier opposite the semiconductor chip, or both, the layer stack including at least a first electrically insulating layer, the first electrically insulating layer having a laminate having a first electrically insulating matrix material and a first mechanically stabilizing material embedded in the first electrically insulating matrix material.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 20, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Yong Chern Poh, Sze Lin Celine Tan, Teck Sim Lee, Kean Cheong Lee, Ralf Otremba, Xaver Schloegel, Juergen Schredl, Josef Hoeglauer
  • Publication number: 20100193920
    Abstract: A semiconductor device is disclosed having a leadframe comprising a first chip island and a second chip island. Each chip island of the leadframe has a first face and a second face. A first chip is attached to the first face of the first chip island and a second chip attached to the first face of the second chip island. A layer of encapsulation material forming an encapsulation material layer covers the second faces of the first and second chip islands where the thickness of the encapsulation material layer along the second face of the first chip island is different from the thickness of the encapsulation material layer along the second face of the second chip island.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 5, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Yong Chern Poh, Yang Hong Heng, Pey Eik Foo
  • Patent number: 7674657
    Abstract: There is provided a method of making an encapsulated component package, including providing a support for supporting the components of the package during encapsulation, the support including legs extending beyond the perimeter of the final package, rupturing the support legs, and covering the exposed ends of the legs with an insulating material. There is also provided a package formed in accordance with the method.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: March 9, 2010
    Assignee: Infineon Technologies AG
    Inventors: Chai Wei Heng, Yang Hong Heng, Yong Chern Poh
  • Publication number: 20080157433
    Abstract: There is provided a method of making an encapsulated component package, including providing a support for supporting the components of the package during encapsulation, the support including legs extending beyond the perimeter of the final package, rupturing the support legs, and covering the exposed ends of the legs with an insulating material. There is also provided a package formed in accordance with the method.
    Type: Application
    Filed: March 12, 2008
    Publication date: July 3, 2008
    Inventors: Chai Wei Heng, Yang Hong Heng, Yong Chern Poh