Abstract: A circuit arrangement is provided. The circuit arrangement includes a plurality of two-terminal devices, a via interconnection circuit having a support structure, a plurality of through-vias defined through the support structure, and a plurality of via trenches defined in the support structure, the plurality of via trenches being arranged to allow electrical coupling to the plurality of through-vias, and a selection circuit having a plurality of selection devices, wherein, for each two-terminal device of the plurality of two-terminal devices, the two-terminal device is arranged outside of a respective via trench of the plurality of via trenches, the two-terminal device being electrically coupled to a respective selection device of the plurality of selection devices in a one-to-one arrangement through the respective via trench and a respective through-via of the plurality of through-vias. According to a further embodiment, a method of forming the circuit arrangement is also provided.

Abstract: A method for forming a semiconductor device is presented. The method includes providing a substrate prepared with a dielectric layer formed thereon. The dielectric layer having a conductive line disposed in an upper portion of the dielectric layer. The substrate is processed to produce a top surface of the dielectric layer that is not coplanar with a top surface of the conductive line to form a stepped topography.

Abstract: A method for forming a semiconductor device is presented. The method includes providing a substrate prepared with a dielectric layer formed thereon. The dielectric layer having a conductive line disposed in an upper portion of the dielectric layer. The substrate is processed to produce a top surface of the dielectric layer that is not coplanar with a top surface of the conductive line to form a stepped topography.

Abstract: A method for forming a semiconductor device is presented. The method includes providing a substrate prepared with a dielectric layer formed thereon. The dielectric layer having a conductive line disposed in an upper portion of the dielectric layer. The substrate is processed to produce a top surface of the dielectric layer that is not coplanar with a top surface of the conductive line to form a stepped topography.

Abstract: A method for forming a semiconductor device is presented. The method includes providing a substrate prepared with a dielectric layer formed thereon. The dielectric layer having a conductive line disposed in an upper portion of the dielectric layer. The substrate is processed to produce a top surface of the dielectric layer that is not coplanar with a top surface of the conductive line to form a stepped topography.