Abstract: A method of forming metal wirings of a nonvolatile memory device include forming a first insulating layer over a semiconductor substrate including a first junction area and a second junction area, forming first and second contact holes through which the first and second junction areas are respectively exposed in the first insulating layer, forming first and second contact plugs within the first and second contact holes, etching a part of the second contact plug, thus forming a recess, forming a second insulating layer to fill the recess, forming a third insulating layer over the semiconductor substrate including the first and second insulating layers, forming a first trench through which the first contact plug is exposed a second trench through which the second contact plug is exposed by etching the third insulating layer, and forming first and second metal wirings within the first and second trenches, respectively.

Abstract: A method for fabricating a semiconductor device includes forming a target etch layer over a substrate, a first auxiliary layer over the target etch layer, an isolation layer over the first auxiliary layer, and a second auxiliary layer over the isolation layer. A first exposure process is performed, where the first auxiliary layer is in focus and the second auxiliary layer is out of focus. A second exposure process is performed, where the second auxiliary layer in focus and the first auxiliary layer is out of focus. The second auxiliary layer is developed to form first mask patterns. The isolation layer and the first auxiliary layer are etched by using the first mask patterns to form second mask patterns. The second mask patterns are developed to form third mask patterns that are used to facilitate subsequent etching of the target etch layer.

Abstract: The present invention relates to a composition for the prevention or treatment lipid metabolic disorders comprising fucoxanthin or marine plant extract comtaining the same as an effective indredients. Fucoxanthin or a marine plant extract comprising the same is effective in reducing weight increase and reducing triglyceride and cholesterol level in liver tissue, or plasma through inhibiting the synthesis of fatty acid and promoting the oxidation of fatty acid. Therefore, the composition comprising fucoxanthin or a marine plant extract comprising the same as an effective ingredient may be effectively used for the prevention and treatment of lipid metabolic disorders.

Abstract: A CPC acylase mutant of the present invention has an improved reactivity and specific activity to CPC, which can be efficiently employed for directly preparing 7-ACA from CPC by a one-step enzymatic method.

Abstract: A computer based method of biometric analysis which compares a first vector from a first biometric sample with a second vector from a second biometric sample. The vectors have at least one biometric feature. A method which compares two biometric samples. The samples form at least one cluster of at least one vector based on feature similarities between the samples. An apparatus incorporating a means for performing the method taught herein. A computer-readable medium and a propagated computer data signal transmitted via a propagation medium, with instructions which when executed by a processor, carry out the method of the present invention. A method of handwriting analysis which calculates a first metric from a first vector having at least one feature from a sample, calculates a second metric from a second vector having at least one feature from a second sample, and calculates the distance in two-dimensional feature space between metrics.

Abstract: A method of forming metal wirings of a nonvolatile memory device include forming a first insulating layer over a semiconductor substrate including a first junction area and a second junction area, forming first and second contact holes through which the first and second junction areas are respectively exposed in the first insulating layer, forming first and second contact plugs within the first and second contact holes, etching a part of the second contact plug, thus forming a recess, forming a second insulating layer to fill the recess, forming a third insulating layer over the semiconductor substrate including the first and second insulating layers, forming a first trench through which the first contact plug is exposed a second trench through which the second contact plug is exposed by etching the third insulating layer, and forming first and second metal wirings within the first and second trenches, respectively.

Abstract: A method for fabricating a semiconductor device includes forming a target etch layer over a substrate, a first auxiliary layer over the target etch layer, an isolation layer over the first auxiliary layer, and a second auxiliary layer over the isolation layer. A first exposure process is performed, where the first auxiliary layer is in focus and the second auxiliary layer is out of focus. A second exposure process is performed, where the second auxiliary layer in focus and the first auxiliary layer is out of focus. The second auxiliary layer is developed to form first mask patterns. The isolation layer and the first auxiliary layer are etched by using the first mask patterns to form second mask patterns. The second mask patterns are developed to form third mask patterns that are used to facilitate subsequent etching of the target etch layer.

Abstract: A method of forming a semiconductor device includes forming a first conductive layer over a semiconductor substrate. A dielectric layer is formed over the first conductive layer. A mask pattern having a first opening is formed over the dielectric layer. The mask pattern is annealed to convert the first opening into a second opening that is smaller than the first opening. The dielectric layer is etched using the mask pattern with the second opening to form a hole that exposes the first conductive layer. A second conductive layer is formed over the dielectric layer and within the hole, the second conductive layer contacting the first conductive layer pattern through the hole.

Abstract: A semiconductor device includes a gate pattern formed over a semiconductor substrate, the substrate defining a cell region and a peripheral region. First and second contact plugs are formed in the cell region. Third and fourth contact plugs are formed in the peripheral region. A first separation structure is formed in the cell region and covers the first contact plug. A second separation structures are formed in the peripheral region and define first and second openings, the first opening exposing an upper portion of the third contact plug, the second opening exposing an upper portion of the fourth contact plug. First, second, and third metal wire sections are formed over the first, second, third, and fourth contact plugs. The first metal wire section is formed in the cell region and contacts the second contact plug. The second metal wire section is formed in the peripheral region and contacts the third contact plug.

Abstract: Disclosed is a method for manufacturing a semiconductor device. The method comprises the steps of: providing a first substrate and a second substrate; forming a capacitor and a gate line on a first surface of the first substrate; forming an insulating layer on a resultant structure of the first substrate; bonding the second substrate to the insulating layer of the first substrate; turning a resultant structure over in such a manner that a second surface of the first substrate is an upper surface of the resultant structure; polishing the second surface of the first substrate by a predetermined thickness; forming an isolation layer for defining an active region by performing an isolation process with respect to the second surface of the first substrate for which a polishing process is finished; and forming a bit line on the active region in the first substrate.

Abstract: The present invention relates to a method for producing a recombinant polynucleotides comprising the steps of generating a pool of unidirectional single-stranded polynucleotide fragments from two or more homologous double-stranded polynucleotides, conducting a polymerization process comprising multi-cyclic extension reactions using the unidirectional single-stranded polynucleotide fragments as templates and specific oligonucleotides as primers to obtain recombinant polynucleotides, and conducting a polymerase chain reaction using at least one primer to amplify the recombinant polynucleotides; and a method for constructing a recombinant DNA library comprising the steps of inserting the recombinant polynucleotide prepared by the above method into a vector and transforming an expression cell with said vector containing the recombinant polynucleotide to obtain a plurality of mutant clones.

Abstract: A method for evolving a polypeptide or a polynucleotide coding therefor, which comprises preparing a library of mutant polynucleotides through transposon-mediated random substitution, insertion or deletion of a multiple of three nucleotides on a polynucleotide coding for a target protein, expressing the mutant polynucleotides in a host cell and screening for a polypeptide having a desired property.

Abstract: This invention relates to a method for recovering useful products from soy fractions with high efficiency, and more specifically to increasing the recovery yield of pinitol or chiro-inositol from soy fractions, in which it is contained by a process comprising the steps of culturing a microorganism to transform pinitol derivatives into pinitol in soy fractions, thereby to increase the pinitol content in soy fractions, followed by removing microorganisms, insoluble materials and other macromolecules from said fractions by centrifugation or filtration to obtain an aqueous solution containing pinitol or chiro-inositol, contacting said solution with activated carbon to adsorb the pinitol or chiro-inositol, contacting said solution with activated carbon to adsorb the pinitol or chiro-inositol, and then recovering it by stepwise or gradient elution with an organic solvent.

Abstract: The present invention relates to a method for producing a recombinant polynucleotides comprising the steps of generating a pool of unidirectional single-stranded polynucleotide fragments from two or more homologous double-stranded polynucleotides, conducting a polymerization process comprising multi-cyclic extension reactions using the unidirectional single-stranded polynucleotide fragments as templates and specific oligonucleotides as primers to obtain recombinant polynucleotides, and conducting a polymerase chain reaction using at least one primer to amplify the recombinant polynucleotides; and a method for constructing a recombinant DNA library comprising the steps of inserting the recombinant polynucleotide prepared by the above method into a vector and transforming an expression cell with said vector containing the recombinant polynucleotide to obtain a plurality of mutant clones.

Abstract: The present invention is directed to prevent generating repair by-products during a repair process of a phase shift mask, and defects on a quartz substrate. According to the present invention, a repair method for phase shift mask in a semiconductor device so as to remove a bridge formed between a phase shift layer on a quartz substrate, comprises the steps of: first repairing the bridge by implanting a charging ion according to a focused ion beam(“FIB”) method; and second repairing the first repaired bridge portion by emitting laser and then removing the bridge.

Abstract: A neural network provides both linearly separable and non-linearly separable logic operations, including the exclusive-or operation, on input signals in a single layer of circuits. The circuit weights the input signals with complex weights by multiplication and addition, and provides weighted signals to a neuron circuit (a neuron body or some a) which provides an output corresponding to the desired logical operation.

Abstract: In a mail sorting system 10, output pixel intensities of an optical scanner 18 have their contrast locally enhanced. A contrast enhancer 24 uses statistical methods (averaging, standard deviation) coupled with empirical stretch and offset data stored in a ROM 25, to enhance pixel contrast in a pipelined processing operation.

Abstract: A neural network provides both linearly separable and non-linearly separable logic operations, including the exclusive-or operation, on input signals in a single layer of circuits. The circuit weights the input signals with complex weights by multiplication and addition, and provides weighted signals to a neuron circuit (a neuron body or soma) which provides an output corresponding to the desired logical operation.

Abstract: An analog synapse circuit for an artificial neural network requiring less circuitry and interconnections than prior synapses, while affording better weight programming means uses two complementary floating-gate MOSFETs with tunneling injection in an inverter configuration, with each MOSFET storing a weight value. This weight value is set by storing a charge injected by Fowler-Nordheim tunneling, or other tunneling means, into the floating-gate, which shifts the threshold voltage of the device. A programming line applies a current pulse to the MOSFET floating gate to write or erase this stored charge, thereby adjusting the weight of the MOSFET. The two MOSFETs are connected with the gate electrodes connected together and the drain electrodes connected together to provide a common gate and common drain between the two MOSFETs. An input line is connected to the common gate, and an output line is connected to the common drain. The source electrodes of each MOSFET are connected to reference voltages.

Abstract: A digital data memory unit and memory unit array, each unit of which can be searched in accordance with the contents thereof and updated, utilizes a digital storage element in the form of a register, latch, or memory cell, a comparator and control logic. Data is presented to the units in parallel on data lines and compare data is supplied in parallel to the units along other data lines. Parallel search of data in each unit, with multiple updates in units where the stored data matches the compare data, occurs rapidly and in one clock cycle (e.g., approximately 50 nanoseconds). The control logic responds to a match output from the comparator and an update enable pulse to enable a new data word on the data lines to be written into the digital storage element of the unit. The memory unit array is useful in image processing for storing pixel values and searching and updating these values in the process of image analysis to recognize certain images.