Patents by Inventor Yong-gi JEONG

Yong-gi JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10804264
    Abstract: An integrated circuit device includes a substrate from which a plurality of fin-type active regions protrude, the plurality of fin-type active regions extending in parallel to one another in a first direction, and a plurality of gate structures and a plurality of fin-isolation insulating portions extending on the substrate in a second direction crossing the first direction and at a constant pitch in the first direction, wherein a pair of fin-isolation insulating portions from among the plurality of fin-isolation insulating portions are between a pair of gate structures from among the plurality of gate structures, and the plurality of fin-type active regions include a plurality of first fin-type regions and a plurality of second fin-type regions.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: October 13, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-yup Chung, Il-ryong Kim, Ju-youn Kim, Jin-wook Kim, Kyoung-hwan Yeo, Yong-gi Jeong
  • Patent number: 10763156
    Abstract: An integrated circuit device includes a substrate having a first region and a second region, a first fin-isolation insulating portion in each of the first region and the second region and having a first width in a first direction, a pair of fin-type active regions spaced apart from each other in each of the first region and the second region with the first fin-isolation insulating portion therebetween, and extending in a straight line in the first direction, a pair of second fin-isolation insulating portions contacting, in each of the first region and the second region, two side walls of the first fin-isolation insulating portion, respectively, each of the two side walls facing the opposite sides in the first direction, and a plurality of gate structures extending in the second direction and comprising a plurality of dummy gate structures.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: September 1, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-yup Chung, Il-ryong Kim, Ju-youn Kim, Jin-wook Kim, Kyoung-hwan Yeo, Yong-gi Jeong
  • Publication number: 20190326158
    Abstract: An integrated circuit device includes a substrate having a first region and a second region, a first fin-isolation insulating portion in each of the first region and the second region and having a first width in a first direction, a pair of fin-type active regions spaced apart from each other in each of the first region and the second region with the first fin-isolation insulating portion therebetween, and extending in a straight line in the first direction, a pair of second fin-isolation insulating portions contacting, in each of the first region and the second region, two side walls of the first fin-isolation insulating portion, respectively, each of the two side walls facing the opposite sides in the first direction, and a plurality of gate structures extending in the second direction and comprising a plurality of dummy gate structures.
    Type: Application
    Filed: October 19, 2018
    Publication date: October 24, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-yup Chung, II-ryong Kim, Ju-youn Kim, Jin-wook Kim, Kyoung-hwan Yeo, Yong-gi Jeong
  • Publication number: 20190319027
    Abstract: An integrated circuit device includes a substrate from which a plurality of fin-type active regions protrude, the plurality of fin-type active regions extending in parallel to one another in a first direction, and a plurality of gate structures and a plurality of fin-isolation insulating portions extending on the substrate in a second direction crossing the first direction and at a constant pitch in the first direction, wherein a pair of fin-isolation insulating portions from among the plurality of fin-isolation insulating portions are between a pair of gate structures from among the plurality of gate structures, and the plurality of fin-type active regions include a plurality of first fin-type regions and a plurality of second fin-type regions.
    Type: Application
    Filed: October 25, 2018
    Publication date: October 17, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-yup CHUNG, II-ryong KIM, Ju-youn KIM, Jin-wook KIM, Kyoung-hwan YEO, Yong-gi JEONG