Abstract: Disclosed are a raw material supply method including vaporizing a raw material in a canister, discharging the vaporized raw material, measuring an inner temperature of the canister, calculating a calculated temperature by using the inner temperature, and compensating a variation of the inner temperature by heating a heating unit disposed on the canister at the calculated temperature and a raw material supply apparatus applied to the method for supplying the raw material. The raw material supply method and apparatus may stably supply the vaporized raw material to a process space.

Abstract: A display device includes: a substrate having a display area including a subpixel and a non-display area surrounding the display area; a driving transistor and a light emitting diode in the subpixel on the substrate; an overcoat layer between driving transistor and the light emitting diode; and a bank layer on the overcoat layer, wherein in the non-display area, parts of the overcoat layer and the bank layer are removed to form at least one trench.

Abstract: Provided is a method for depositing a thin film, which is performed to deposit a thin film on a substrate. A method for depositing a thin film includes supplying a source gas together with a first diffusion gas onto a substrate provided in a process space, and supplying a reactant gas together with a second diffusion gas onto the substrate to continuous with the supplying of the source gas. The first diffusion gas and source gas and the second diffusion gas and reactant gas are supplied onto the substrate through paths different from each other.

Abstract: An n-type semiconductor substrate 11 has a p-type well 12 in which are formed a charge transfer channel 13, a flowing diffusion region 14 made of an n-type impurity region, an n-type buried region 16 and a reset drain region 15. Transfer gates 51 and 52 of a horizontal CCD and an output gate 41 are formed on the surface of the charge transfer channel 13, with an insulation film 20 interposed; reset electrodes 31 and 32 are formed on the surface of the buried region 16, again with the insulation film 20 interposed. The floating diffusion region 14 is connected to a source follower circuit 6. The reset electrodes 31 and 32 are provided adjacent to each other in the channel direction of a reset gate section 3 and can be driven independently of each other.

Abstract: A solid-state image pickup device in which many photoelectric converters are arranged in a shifted-pixel layout includes a vertical charge transfer path whose width is larger in a region in which an isolation area is disposed on both sides of the transfer path than in a region in which the isolation area is arranged on only one side thereof. This prevents an event in which the transfer efficiency and the saturation output of charge in the vertical charge transfer path are locally changed by the narrow channel effect.

Abstract: An n-type semiconductor substrate 11 has a p-type well 12 in which are formed a charge transfer channel 13, a flowing diffusion region 14 made of an n-type impurity region, an n-type buried region 16 and a reset drain region 15. Transfer gates 51 and 52 of a horizontal CCD and an output gate 41 are formed on the surface of the charge transfer channel 13, with an insulation film 20 interposed; reset electrodes 31 and 32 are formed on the surface of the buried region 16, again with the insulation film 20 interposed. The floating diffusion region 14 is connected to a source follower circuit 6. The reset electrodes 31 and 32 are provided adjacent to each other in the channel direction of a reset gate section 3 and can be driven independently of each other.

Abstract: A solid state image pickup device is provided, that improves the transfer efficiency of charges in the horizontal charge transfer path by implementing a selectively arranged matrix of semiconductor layers with differing conductivity type, impurity concentration and orientation. Further, the solid state image pickup device prevents the lowering of the transfer efficiency of charges transferred from the vertical charge transfer path to the horizontal charge transfer path.

Abstract: A solid-state image sensor in which an interface area between a vertical charge coupled device (VCCD) and a horizontal charge coupled device (HCCD) is formed under the HCCD, thereby maximizing charge-transferring efficiency is disclosed, including a substrate; a well formed in the substrate; a first impurity region formed in the well under the VCCD and the HCCD; and second impurity regions selectively formed in the first impurity region to have a border from the first impurity region under the HCCD, wherein the second impurity regions have a different ion concentration from the first impurity region.

Abstract: A charge transfer device which comprises vertical charge transfer devices which transfer charges in the vertical direction, first and second horizontal charge transfer devices which transfer the charges from the vertical charge transfer devices in the horizontal direction, and a shift gate which controls the charges from the vertical charge transfer devices to be supplied to one the first horizontal charge device or the second horizontal charge transfer device, wherein the first. horizontal charge transfer device is a semiconductor region between the vertical charge transfer devices and the second horizontal charge transfer device and includes highly-doped regions having tapered portions whose one ends near the second horizontal charge transfer device are broader than another ends near the vertical charge transfer devices.

Abstract: In forming a photodiode by forming a burying layer on a charge accumulation region, the readout gate channel for the photodiode is separated from a high impurity concentration region of the burying layer of the photodiode, and at least a partial area of the high impurity concentration region is separated from the channel stopper region of the photodiode. Noises of a solid-state image pickup device using buried type photodiodes can be reduced.

Abstract: A solid state image sensor includes a photodiode, a vertical charge coupled device positioned to a side of the photodiode for transmitting charges generated in the photodiode, a first polygate extending in a horizontal direction and partly overlapping the vertical charge coupled device, and a second polygate extending in a horizontal direction, partly overlapping the vertical charge coupled device and having a second polygate extension, wherein the second polygate extension extends for substantially an entire length of the side of the photodiode.

Abstract: A charge-coupled device includes a first P-type well formed in an N-type semiconductor substrate, a second P-type well formed repeatedly the first P-type well region, a charge-transfer region (BCCD) formed within the second P-type well region, an N-type photodiode region (PDN) formed in the upper portion of the first P-type well so as to be isolated from the charge-transfer region, a first high concentration P-type photodiode region (first PDP.sup.+ region) formed in the upper surface of the N-type photodiode region excluding the charge-transfer region and serving as a charge-isolating layer, first and second poly-gates formed repeatedly on the charge-transfer region, and a second high concentration self aligned P-type photodiode region (second PDP.sup.+ region) formed in the surface of the first high concentration P-type photodiode region. The charge-isolating region is thin to extend the potential pocket of each light-conversion PDN region.

Abstract: A charge-coupled device includes a first P-type well formed in an N-type semiconductor substrate, a second P-type well formed repeatedly the first P-type well region, a charge-transfer region (BCCD) formed within the second P-type well region, an N-type photodiode region (PDN) formed in the upper portion of the first P-type well so as to be isolated from the charge-transfer region, a first high concentration P-type photodiode region (first PDP.sup.+ region) formed in the upper surface of the N-type photodiode region excluding the charge-transfer region and serving as a charge-isolating layer, first and second poly-gates formed repeatedly on the charge-transfer region, and a second high concentration self aligned P-type photodiode region (second PDP.sup.+ region) formed in the surface of the first high concentration P-type photodiode region. The charge-isolating region is thin to extend the potential pocket of each light-conversion PDN region.

Abstract: A D/A converter using a CCD for converting digital data to analog data, the CCD comprises a semiconductor having a first-conductivity type well. High-concentration charge source regions are positioned on predetermined portions of the semiconductor substrate in correspondence to the number of bits of the digital data. A plurality of barrier gates are formed on the charge source regions to respectively receive the bit signals of the digital data. Poly-gates are formed on the charge source regions having area that differ in correspondence to the bit signals of the digital data. A common output gate is formed on each of the poly-gates, and a high-concentration, second-conductivity type, floating diffusion area is formed on the output gate to collect charges accumulated in the poly-gates and to sense an overall amount of the charges.

Abstract: An analog-to-digital (A/D) converter using a charge-coupled device (CCD) for converting analog data to digital data, the CCD including a plurality of gates with potential wells, the number of gates corresponding to a number of bits of the digital data, and a size of each potential well corresponding to a given significant bit and being one-half the size of the potential well corresponding to the next most significant bit. The charges of an input analog signal are transmitted to respective potential wells. A plurality of driving circuits apply a voltage to the respective potential wells and output the charges stored in the respective potential wells as digital data.

Abstract: Solid state image sensor of an improved charge transfer efficiency, including a first conductive type semiconductor substrate; a plurality of photodiodes each formed on a surface of the first conductive type semiconductor substrate; a second conductive type first well formed under the surface of the first conductive type substrate; a second conductive type second well formed under the surface of the first conductive semiconductor substrate so that a part of the second well forms an overlapped region with the first well; a plurality of first conductive type vertical charge coupled devices (VCCDs) each formed under a surface of a region of the first well for transferring signal charges generated in the photodiodes toward output side of the VCCD in response to external vertical transfer clock signals; vertical transfer gates formed extended over the plurality of the VCCDs for applying the external vertical transfer clock signals; a first conductive type horizontal charge coupled device (HCCD) formed in a region