Abstract: The present disclosure relates to a printed circuit board including, a first insulating layer, a first metal layer disposed on the first insulating layer, a bridge disposed on the first metal layer and including a bridge insulating layer and a bridge circuit layer, a second insulating layer disposed on the first insulating layer and covering at least a portion of the bridge, a second metal layer disposed on the second insulating layer, and a connecting via penetrating the bridge and the second insulating layer to connect the first metal layer to the second insulating layer. The connecting via is spaced apart from the bridge circuit layer.

Abstract: Disclosed is a technique for switching from a master node to a secondary node in a communication system. A method of a first communication node may comprise: adding the first communication node as a primary secondary cell (PSCell) to a second communication node through dual connectivity (DC); generating a first user plane path for smart dynamic switching (SDS) and a first instance for supporting the first user plane path according to a request from the second communication node; transmitting information on the first user plane path and the first instance to a terminal; receiving user data based on the first user plane path from the terminal as the first instance; and transmitting the user data to a core network using the first user plane path.

Abstract: Embodiments relate to laser welding methods, monitoring methods, and monitoring systems for a secondary battery. A laser welding method for a secondary battery includes performing laser welding on a positive electrode base having a thin-film shape in which a plurality of positive electrode base tabs are formed at a side, a negative electrode base having a thin-film shape in which a plurality of negative electrode base tabs are formed at a side, and a thin-film multi-tab to be joined to each of the positive electrode base and the negative electrode base, a welded portion in which the multi-tab is welded with the positive electrode base and the negative electrode base being melting-joined by using a laser such that a plurality of welding spots is formed on the welded portion.

Abstract: An apparatus for manufacturing a secondary battery includes: an index table configured to receive a secondary battery cell, the secondary battery cell including an electrode assembly, a can accommodating the electrode assembly, and an electrode tab between the electrode assembly and the can to electrically connect the electrode assembly to the can; a laser scanner configured to irradiate laser onto an outer surface of the can to weld the electrode tab to the can; and a controller configured to variably control the laser scanner according to an operation of the index table.

Abstract: One aspect of the present invention provides a compound in which a functional group capable of binding to a globulin Fc region or a physiologically active polypeptide is introduced at one end of a non-peptidic polymer and a functional group capable of a click reaction is introduced at the other end; a polypeptide conjugate in which a physiologically active polypeptide binds to one end of the compound; a physiologically active polypeptide conjugate in which a physiologically active polypeptide and an immunoglobulin Fc region bind to both ends thereof by using the compound as a linker; and methods for preparing the same compound, polypeptide conjugate, and physiologically active polypeptide conjugate.

Abstract: The present invention relates to a pyrrolobenzodiazepine derivative compound, a conjugate of the same with a ligand, and the use of the same. The pyrrolobenzodiazepine derivative compound is more stable in plasma, is stable even in circulation, and exhibits excellent efficacy. In particular, the conjugate of the pyrrolobenzodiazepine derivative compound with a ligand has a great advantage in that it is possible to target and specifically treat proliferative disease such as cancer, maximize drug efficacy, and minimize the expression of side effects since the conjugate more stably reaches the target cell and effectively exerts drug efficacy while toxicity is greatly reduced as a linker technology that allows drugs to be easily released within cancer cells and maximize drug efficacy is incorporated.

Abstract: A variable length code(VLC) decoding apparatus for simultaneously decoding two different VLC bit streams includes two storage units, in response to each read signal, for storing fixed length segments contained in each of the VLC bit streams; a first switch for selecting the fixed length segments from a first or a second storage unit, and for selecting a first or a second window control signal; a barrel shifter in response to selected window control signal for forming a decoding window on the selected segments in order to produce a decoding window output sequence thereof; a memory for producing a decoded word in response to a variable length codeword and for producing a codeword length output; a second switch, in response to a second selection signal, for producing the decoded word and the codeword length output as a first decoded word and a first codeword length or a second decoded word and a second codeword length output; two accumulators, in response to each of the codeword lengths, for generating the two w

Abstract: FIFO buffer system capable of effectively controlling write and read operations thereof comprises N number of cascaded FIFO buffers, each of the cascaded FIFO buffers sequentially storing the input digital data in response to a write signal, sequentially generating the output digital data in response to a read signal and generating storage state signals including a full flag and an empty flag signals representative of the full and empty states thereof, respectively, N being a positive integer larger than 3; a clock for generating a second clock signal; first control means, in response to the full flag signals from the cascaded FIFO buffers, for generating the write signal synchronized with the first clock signal if fewer than (N-1) cascaded FIFO buffers are full; and second control means, in response to the empty flag signals from the cascaded FIFO buffers, for initiating a read operation by generating the read signal synchronized with the second clock if first three cascaded FIFO buffers, which have sequenti

Abstract: A novel FIFO buffer system has an error detection and correction device for effectively detecting and correcting errors therein. The system comprises M number of data storage blocks arranged in parallel for temporarily storing N-bit input digital data and generating storage state signals including full flag and empty flag signals representative of the full and the empty states thereof; an error detector, responsive to the storage state signals, for generating full error signals and empty error signals representative of the errors present among the full flag signals and empty flag signals; and an error corrector, responsive to the full error and the empty error signals, for generating full error correction signals and empty error correction signals for correcting the erroneous storage state occurred in the corresponding data storage means thereto.

Abstract: A variable length code (VLC) decoding apparatus for decoding sequential variable length codewords includes a second barrel shifter cascaded to a first barrel shifter for providing a second table memory device with a decoding window output sequence which is directly shifted in response to a codeword length output from a first table memory device so that the first bit in the decoding window output sequence is the first bit of the next variable length codeword in a decoding window output sequence from the first barrel shifter; and the second table memory device for producing a fixed length codeword in response to each variable length codeword in the second decoding window output sequence, to thereby decode, at each clock cycle, consecutively two variable length codewords without an operational delay in an accumulator for shifting the decoding window of the first barrel shifter.

Abstract: A FIFO buffer system has an error detection and resetting unit for resetting the FIFO buffer system at the occurrence of errors therein. The system comprises M number of data storage circuits arranged in parallel for temporarily storing the N-bit input digital data and producing the N-bit output digital data in synchronization, each of said data storage circuits synchronously storing (N/M)-bit input digital data and generating storage state signals including a full flag and an empty flag signals representative of the full and the empty states thereof, respectively; and error detection and resetting unit, responsive to the storage state signals generated by said M number of data storage circuits, for generating a reset signal for resetting the FIFO buffer system when there exists a discrepancy among the full flag signal or the empty flag signals.

Abstract: A variable length code decoding apparatus comprises an interface circuit for extracting in parallel an objective bit stream having a predetermined number of bits from a 2.sup.n -bit variable length coded serial input bit stream (n is a positive integer), a control circuit for generating a buffer control signal, a barrel shifter control signal, a carry signal and a clock signal, and a lookup table memory connected to the interface circuit and the control circuit, for decoding the objective bit stream from the interface circuit and outputting a decoded symbol and a codeword length corresponding to the decoded symbol.