Abstract: A composite antenna substrate and semiconductor package module includes: a fan-out semiconductor package including a semiconductor chip, an encapsulant encapsulating at least portions of the semiconductor chip, and a connection member including a redistribution layer electrically connected to connection pads; and an antenna substrate including an antenna member including antenna patterns, ground patterns, and feed lines, and a wiring member disposed below the antenna member and including wiring layers including feeding patterns electrically connected to the feed lines.

Abstract: The fan-out sensor package includes: a core member having a through-hole; an integrated circuit (IC) for a sensor disposed in the through-hole and having a first surface having a sensor region and first connection pads disposed thereon, a second surface opposing the first surface and having second connection pads disposed thereon, and through-silicon vias (TSVs) penetrating between the first and second surfaces and electrically connecting the first and second connection pads to each other; an encapsulant covering the core member and the second surface of the IC for a sensor and filling at least portions of the through-hole; a redistribution layer disposed on the encapsulant; and vias penetrating through at least portions of the encapsulant and electrically connecting the redistribution layer and the second connection pads to each other.

Abstract: A printed circuit board includes: a core member including a through-hole; a sub-circuit board disposed in the through-hole; a first insulating layer disposed on opposing surfaces of the core member and opposing surfaces of the sub-circuit board; and an insulating material disposed between an inner wall of the through-hole and the sub-circuit board.

Abstract: A fan-out component package includes: a core member having a through-hole and including wiring layers and one or more connection vias; one or more first electronic components disposed in the through-hole; a first encapsulant covering at least portions of the core member and the first electronic components and filling at least a portion of the through-hole; a connection member disposed on the core member and the first electronic components and including one or more redistribution layers electrically connected to the wiring layers and the first electronic components; one or more second electronic components disposed on the connection member and electrically connected to the redistribution layers; and a second encapsulant disposed on the connection member and encapsulating the second electronic components, wherein an upper surface of the connection member and a lower surface of the second encapsulant are spaced apart from each other by a predetermined interval.

Abstract: An antenna module includes a first connection member including at least one first wiring layer and at least one first insulating layer; an antenna package disposed on a first surface of the first connection member, and including a plurality of antenna members and a plurality of feed vias; an integrated circuit (IC) disposed on a second surface of the first connection member and electrically connected to the corresponding wire of at least one first wiring layer; and a second connection member including at least one second wiring layer electrically connected to the IC and at least one second insulating layer, and disposed between the first connection member and the IC, wherein the second connection member has a third surface facing the first connection member and having an area smaller than that of the second surface, and a fourth surface facing the IC.

Abstract: An antenna module includes a connection member including at least one wiring layer and at least one insulating layer, an antenna package including a plurality of antenna members transmitting or receiving a radio frequency (RF) signal and a plurality of feed vias respectively electrically connected to the plurality of antenna members at one end and respectively electrically connected to a wiring corresponding to the at least one wiring layer at the other end, and positioned on a first surface of the connection member, an integrated circuit (IC) disposed on a second surface of the connection member and electrically connected to the wiring corresponding to the at least one wiring layer to receive an intermediate frequency (IF) signal or baseband signal and transfer an RF signal or receive an RF signal and transfer an IF signal or baseband signal, and a filter filtering an IF signal or a baseband signal.

Abstract: A fan-out semiconductor package module that is easily manufactured includes a first connection member including a wiring layer, a first passive component mounted on the first connection member, a first encapsulation portion encapsulating at least a portion of the first connection member and the first passive component, a semiconductor chip having an active surface with a connection pad disposed thereon and an inactive surface opposing the active surface and disposed in a first through-hole penetrating through the first connection member and the first encapsulation portion, a second encapsulation portion covering at least a portion of the semiconductor chip and encapsulating at least a portion of the first encapsulation portion and the first connection member, and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad and the first passive component.

Abstract: A fan-out semiconductor package module includes: a structure including a wiring member including wiring patterns, one or more first passive components disposed on the wiring member and electrically connected to the wiring pattern, and a first encapsulant encapsulating at least portions of each of the one or more first passive components, and having a first through-hole penetrating through the wiring member and the first encapsulant; a semiconductor chip disposed in the first through-hole of the structure and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; a second encapsulant encapsulating at least portions of the semiconductor chip and filling at least portions of the first through-hole; and a connection member disposed on the structure and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the wiring patterns.

Abstract: A fan-out fingerprint sensor package includes a first connection member having a through-hole, a fingerprint sensor disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member and the fingerprint sensor, and a second connection member disposed on the first connection member and an active surface of the fingerprint sensor. The first connection member includes a distribution layer. The second connection member includes a first insulating layer disposed on the distribution layer and the active surface, a redistribution layer disposed on the first insulating layer, a first via connecting the redistribution layer to a connection pad of the fingerprint sensor, and a second via connecting the redistribution layer to the distribution layer. The first via passes through the first insulating layer and at least a portion of the encapsulant, and the second via passes through the first insulating layer.

Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.

Abstract: A fan-out sensor package includes: a first semiconductor chip module including a first connection member having a first through-hole and a first wiring layer, a first semiconductor chip disposed in the first through-hole and having an active surface on which a sensing region and first connection pads are disposed, and an encapsulant encapsulating at least portions of the first connection member and the first semiconductor chip and filling at least portions of the first through-hole; a redistribution module having a second through-hole exposing at least a portion of the sensing region and including a redistribution layer; and electrical connection structures electrically connecting the first wiring layer and the first connection pads to the redistribution layer.

Abstract: An antenna module includes a connection member including at least one wiring layer and at least one insulating layer; an integrated circuit (IC) disposed on a first surface of the connection member and electrically connected to at least one wiring layer; and an antenna package disposed on a second surface of the connection member, and including a dielectric layer, a plurality of antenna members, and a plurality of feed vias, wherein the antenna package further includes a chip antenna including a dielectric body and first and second electrodes, respectively disposed on first and second surfaces of the dielectric body, wherein the chip antenna is disposed to be spaced apart from the plurality of feed vias within the dielectric layer so that at least one of the first electrode or the second electrode is electrically connected to a corresponding wire of the at least one wiring layer.

Abstract: A fan-out semiconductor package includes first and second structures. The first structure includes a first semiconductor chip, a first encapsulant, and a connection member. The second structure includes a second semiconductor chip, a second encapsulant, and conductive bumps. The first and second structures are disposed so that active surfaces of the first and second semiconductor chips face each other. The conductive bumps are electrically connected to a redistribution layer, and connection pads of the first and second semiconductor chips are connected to each other through the redistribution layer in a signal manner. Signal transmission times between one point of the redistribution layer and connection pads of each of the first and second semiconductor chips are substantially the same as each other.

Abstract: A composite antenna substrate and semiconductor package module includes: a fan-out semiconductor package including a semiconductor chip, an encapsulant encapsulating at least portions of the semiconductor chip, and a connection member including a redistribution layer electrically connected to connection pads; and an antenna substrate including an antenna member including antenna patterns, ground patterns, and feed lines, and a wiring member disposed below the antenna member and including wiring layers including feeding patterns electrically connected to the feed lines.

Abstract: A fan-out semiconductor package includes first and second structures. The first structure includes a first semiconductor chip, a first encapsulant, and a connection member. The second structure includes a second semiconductor chip, a second encapsulant, and conductive bumps. The first and second structures are disposed so that active surfaces of the first and second semiconductor chips face each other. The conductive bumps are electrically connected to a redistribution layer, and connection pads of the first and second semiconductor chips are connected to each other through the redistribution layer in a signal manner. Signal transmission times between one point of the redistribution layer and connection pads of each of the first and second semiconductor chips are substantially the same as each other.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package are disclosed. The semiconductor package including a first substrate including a first cavity, a cavity mold configured to be inserted into the first cavity and including a second cavity, an electronic component inserted in the second cavity, and a second substrate formed on a surface of the first substrate, a surface of the cavity mold and a surface of the electronic component.

Abstract: A fan-out semiconductor package includes a semiconductor chip disposed in a through-hole of a first connection member having the through-hole and a second connection member disposed on an active surface of the semiconductor chip. A plurality of dummy vias surrounding the semiconductor chip are disposed in the first connection member.

Abstract: A semiconductor package includes a core member having a cavity penetrating through first and second surfaces, a semiconductor chip disposed in the cavity and having an active surface having connection, a passive component module disposed in the cavity, including a plurality of passive components and a resin portion encapsulating the plurality of passive components, and having a mounting surface from which connection terminals of the passive components are exposed, a connection member on the second surface and including a redistribution layer connected to the connection pads of the semiconductor chip and connection terminals of some of the plurality of passive components, connection terminals of the others of the plurality of passive components not being connected to the redistribution layer.

Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.

Abstract: A fan-out sensor package includes: an image sensor chip including an integrated circuit (IC) for an image sensor having a first surface having first connection pads disposed thereon, a second surface opposing the first surface and having second connection pads disposed thereon, and through-silicon-vias (TSVs) penetrating between the first surface and the second surface and electrically connecting the first and second connection pads to each other and an optical portion disposed on the first surface of the IC for an image sensor and having a plurality of lens layers; an encapsulant covering at least portions of the second surface of the IC for an image sensor; a redistribution layer disposed on the encapsulant; and vias penetrating through at least portions of the encapsulant and electrically connecting the redistribution layer and the second connection pads to each other.