Patents by Inventor Yong-Ho Yoo

Yong-Ho Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136993
    Abstract: A rendering method of an object-based audio signal and an apparatus for performing the same are provided. The rendering method of an object-based audio signal includes obtaining a rendered audio signal, performing clipping prevention on the rendered audio signal using a first limiter, mixing a signal output by the first limiter using a mixer, and performing clipping prevention on the mixed signal using a second limiter.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 25, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Ju LEE, Jae-hyoun YOO, Dae Young JANG, Soo Young PARK, Young Ho JEONG, Kyeongok KANG, Tae Jin LEE
  • Publication number: 20240131057
    Abstract: The present invention relates to a composition for treating inflammatory diseases comprising germanium telluride nanosheets coated with polyvinylpyrrolidone, and the nanosheets have excellent anti-inflammatory and thus are excellent in treating inflammatory bowel disease and psoriasis.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Kyung-Hwa Yoo, Jun Ho Song, Yong-Beom Park, Sun-Mi Lee, Chin Hee Min, Taejun Yoon
  • Publication number: 20240129682
    Abstract: A method of rendering object-based audio and an electronic device performing the method are provided. The method includes identifying a bitstream, determining a reference distance of an object sound source based on the bitstream, determining a minimum distance for applying distance-dependent attenuation, based on the reference distance, and determining a gain of object-based audio included in the bitstream based on the reference distance and the minimum distance.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 18, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Ju LEE, Jae-hyoun YOO, Dae Young JANG, Soo Young PARK, Young Ho JEONG, Kyeongok KANG, Tae Jin LEE
  • Patent number: 11531843
    Abstract: A substrate inspection apparatus generates, when anomalies of a plurality of second solder pastes among a plurality of first solder pastes printed on a first substrate is detected, at least one image indicating a plurality of second solder pastes with anomalies detected by using an image about a first substrate, applies the at least one image to a machine-learning-based model, acquires a plurality of first values indicating relevance of respective first fault types to the at least one image and a plurality of first images indicating regions associated with one of a plurality of first fault types, determines a plurality of second fault types, which are associated with the plurality of second solder pastes by using the plurality of first values and the plurality of first images, and determines at least one third solder paste, which is associated with the respective second fault types.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: December 20, 2022
    Assignees: KOH YOUNG TECHNOLOGY INC., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Hwan Kim, Juyoun Park, Ye Won Hwang, Jin Man Park, Seung Jae Lee, Tae Min Choi, Yong Ho Yoo, Duk Young Lee
  • Publication number: 20210357693
    Abstract: A substrate inspection apparatus generates, when anomalies of a plurality of second solder pastes among a plurality of first solder pastes printed on a first substrate is detected, at least one image indicating a plurality of second solder pastes with anomalies detected by using an image about a first substrate, applies the at least one image to a machine-learning-based model, acquires a plurality of first values indicating relevance of respective first fault types to the at least one image and a plurality of first images indicating regions associated with one of a plurality of first fault types, determines a plurality of second fault types, which are associated with the plurality of second solder pastes by using the plurality of first values and the plurality of first images, and determines at least one third solder paste, which is associated with the respective second fault types.
    Type: Application
    Filed: January 21, 2020
    Publication date: November 18, 2021
    Applicants: KOH YOUNG TECHNOLOGY INC., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Hwan KIM, Juyoun PARK, Ye Won HWANG, Jin Man PARK, Seung Jae LEE, Tae Min CHOI, Yong Ho YOO, Duk Young LEE
  • Patent number: 11139197
    Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define a plurality of active regions extending in a first direction; forming a trench in an upper portion of the substrate that crosses the active regions in a second direction that intersects the first direction; forming a sacrificial layer that fills the trench; forming support patterns on the sacrificial layer, wherein the support patterns fill recessed regions provided at a top surface of the sacrificial layer; and removing the sacrificial layer. The support patterns are spaced apart from each other with the active regions interposed therebetween.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: October 5, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyungyeon Ha, Yong-Ho Yoo
  • Publication number: 20210143158
    Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define a plurality of active regions extending in a first direction; forming a trench in an upper portion of the substrate that crosses the active regions in a second direction that intersects the first direction; forming a sacrificial layer that fills the trench; forming support patterns on the sacrificial layer, wherein the support patterns fill recessed regions provided at a top surface of the sacrificial layer; and removing the sacrificial layer. The support patterns are spaced apart from each other with the active regions interposed therebetween.
    Type: Application
    Filed: June 24, 2020
    Publication date: May 13, 2021
    Inventors: KYUNGYEON HA, YONG-HO YOO
  • Publication number: 20190367013
    Abstract: In a control device (101) and method for a vehicle (100, 300, 400, 500, 600, 700, 800) for calculating a vehicle trajectory (102) starting from a start position (103, 303, 403, 503, 603, 703, 803) up to an end position (104, 304, 310, 311, 404, 504, 604, 704, 804), a surroundings-sensing device (105) is designed to sense free regions and occupied regions in an area surrounding the vehicle and to output corresponding surroundings information (106), and a trajectory-calculation device (107) is designed to calculate possible first collision-free trajectories for the vehicle based on the surroundings information (106) starting from the start position and to calculate possible second collision-free trajectories for the vehicle starting from the end position.
    Type: Application
    Filed: February 26, 2018
    Publication date: December 5, 2019
    Inventors: Yong-Ho YOO, Hendrik DEUSCH, Frank EDLING
  • Patent number: 9660024
    Abstract: A semiconductor device includes a first memory cell including a first transistor and a first capacitor, the first transistor comprising a first gate electrode, a first source, and a first drain; a second memory cell including a second transistor and the first capacitor, the second transistor comprising a second gate electrode, a second source, and a second drain; a first word line coupled to the first gate electrode; and a second word line coupled to the second gate electrode. The first capacitor is electrically connected between the first and second transistors.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: May 23, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Ho Yoo, Tae-jung Park
  • Publication number: 20160181251
    Abstract: A semiconductor device includes a first memory cell including a first transistor and a first capacitor, the first transistor comprising a first gate electrode, a first source, and a first drain; a second memory cell including a second transistor and the first capacitor, the second transistor comprising a second gate electrode, a second source, and a second drain; a first word line coupled to the first gate electrode; and a second word line coupled to the second gate electrode. The first capacitor is electrically connected between the first and second transistors.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 23, 2016
    Inventors: Yong-Ho YOO, Tae-jung PARK
  • Patent number: 9276058
    Abstract: A semiconductor device includes a plurality of lower electrodes on a substrate, with each of the lower electrodes extending in a height direction from the substrate and including sidewalls, the lower electrodes being spaced apart from each other in a first direction and in a second direction, a plurality of first supporting layer patterns contacting the sidewalls of the lower electrodes, the first supporting layer patterns extending in the first direction between ones of the lower electrodes adjacent in the second direction, a plurality of second supporting layer patterns contacting the sidewalls of the lower electrodes, the second supporting layer pattern extending in the second direction between ones of the lower electrodes adjacent in the first direction, the plurality of second supporting layer patterns being spaced apart from the plurality of first supporting layer patterns in the height direction.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: March 1, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Ho Lee, Jin Choi, Yong-Ho Yoo, Jong-Hyuk Kang, Hyun-Joo Cha, Hee-Dong Park, Tae-Jung Park
  • Publication number: 20150270330
    Abstract: A semiconductor device includes a plurality of lower electrodes on a substrate, with each of the lower electrodes extending in a height direction from the substrate and including sidewalls, the lower electrodes being spaced apart from each other in a first direction and in a second direction, a plurality of first supporting layer patterns contacting the sidewalls of the lower electrodes, the first supporting layer patterns extending in the first direction between ones of the lower electrodes adjacent in the second direction, a plurality of second supporting layer patterns contacting the sidewalls of the lower electrodes, the second supporting layer pattern extending in the second direction between ones of the lower electrodes adjacent in the first direction, the plurality of second supporting layer patterns being spaced apart from the plurality of first supporting layer patterns in the height direction.
    Type: Application
    Filed: June 5, 2015
    Publication date: September 24, 2015
    Inventors: Sung-Ho LEE, Jin CHOI, Yong-Ho YOO, Jong-Hyuk KANG, Hyun-Joo CHA, Hee-Dong PARK, Tae-Jung PARK
  • Patent number: 9054226
    Abstract: A semiconductor device includes a plurality of lower electrodes on a substrate, with each of the lower electrodes extending in a height direction from the substrate and including sidewalls, the lower electrodes being spaced apart from each other in a first direction and in a second direction, a plurality of first supporting layer patterns contacting the sidewalls of the lower electrodes, the first supporting layer patterns extending in the first direction between ones of the lower electrodes adjacent in the second direction, a plurality of second supporting layer patterns contacting the sidewalls of the lower electrodes, the second supporting layer pattern extending in the second direction between ones of the lower electrodes adjacent in the first direction, the plurality of second supporting layer patterns being spaced apart from the plurality of first supporting layer patterns in the height direction.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: June 9, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Ho Lee, Jin Choi, Yong-Ho Yoo, Jong-Hyuk Kang, Hyun-Joo Cha, Hee-Dong Park, Tae-Jung Park
  • Patent number: 8528416
    Abstract: Provided are an apparatus for testing a tensile strength under a high temperature condition and a unit for measuring elongation provided in the same. The apparatus for testing a tensile strength under a high temperature condition includes a base frame part, a test sample loader and a cylinder part connected to the base frame part and applying a tensile force to a test sample, and a heater for forming a high temperature condition to the test sample. The unit for measuring elongation includes a movable frame, a vertical bar, and a measurement head part connected to the vertical bar to measure elongation of the test sample and blocking heat from the heater.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: September 10, 2013
    Assignee: Korea Institute of Construction Technology
    Inventors: Bong Jae Lee, Yong Ho Yoo, Heung Youl Kim, Hyung Jun Kim, Kyung Hoon Park
  • Publication number: 20130015559
    Abstract: A semiconductor device includes a plurality of lower electrodes on a substrate, with each of the lower electrodes extending in a height direction from the substrate and including sidewalls, the lower electrodes being spaced apart from each other in a first direction and in a second direction, a plurality of first supporting layer patterns contacting the sidewalls of the lower electrodes, the first supporting layer patterns extending in the first direction between ones of the lower electrodes adjacent in the second direction, a plurality of second supporting layer patterns contacting the sidewalls of the lower electrodes, the second supporting layer pattern extending in the second direction between ones of the lower electrodes adjacent in the first direction, the plurality of second supporting layer patterns being spaced apart from the plurality of first supporting layer patterns in the height direction.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 17, 2013
    Inventors: Sung-Ho LEE, Jin Choi, Yong-Ho Yoo, Jong-Hyuk Kang, Hyun-Joo Cha, Hee-Dong Park, Tae-Jung Park
  • Publication number: 20120049257
    Abstract: A DRAM device can include a plurality of capacitors that are arranged in a line in a first direction. Each of the capacitors can include an upper electrode. A contact pattern having a line shape can extend in the first direction and can be electrically connected to each of the upper electrodes. A conductor can be on the contact pattern opposite the upper electrodes and can be electrically connected to the contact pattern.
    Type: Application
    Filed: August 12, 2011
    Publication date: March 1, 2012
    Inventors: SungHo Lee, Jin Choi, Yong-Ho Yoo, Jong-Hyuk Kang, Hyun-Joo Cha, Tae-Jung Park
  • Publication number: 20110126635
    Abstract: Provided are an apparatus for testing a tensile strength under a high temperature condition and a unit for measuring elongation provided in the same. The apparatus for testing a tensile strength under a high temperature condition includes a base frame part, a test sample loader and a cylinder part connected to the base frame part and applying a tensile force to a test sample, and a heater for forming a high temperature condition to the test sample. The unit for measuring elongation includes a movable frame, a vertical bar, and a measurement head part connected to the vertical bar to measure elongation of the test sample and blocking heat from the heater.
    Type: Application
    Filed: November 16, 2010
    Publication date: June 2, 2011
    Applicant: KOREA INSTITUTE OF CONSTRUCTION TECHNOLOGY
    Inventors: BONG JAE LEE, Yong Ho Yoo, Heung Youl Kim, Hyung Jun Kim, Kyung Hoon Park
  • Patent number: 5872835
    Abstract: A data interface circuit for portable radio terminal equipment having wire and radio data communication functions, thereby capable of being applied to a variety of communication systems. For a communication using a radio network, the signal type is changed from a differential-ended-signal (DES) type highly influenced by noise to a single-ended-signal (SES) type hardly influenced by noise by an operation of the radio interface unit, thereby enabling the redundancy to noise to be increased. Furthermore, it is possible to provide various audio services by the audio signal processing control unit.
    Type: Grant
    Filed: August 24, 1995
    Date of Patent: February 16, 1999
    Assignee: LG Electronics Inc.
    Inventors: Yong-Ho Yoo, Nam-Sik Joo, Won-Jo Lee