Abstract: A nonvolatile memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory regions coupled to a plurality of word lines. The plurality of memory regions include first and second memory regions coupled to upper and lower word lines, respectively. The control logic performs, after receiving first data and second data, a first program operation on the first memory region to store the first data and a second program operation on the second memory region to store the second data.

Abstract: A memory system includes a memory device; and a controller configured to transmit a target address to the memory device for performing an access operation, receive from the memory device a reference address at which the access operation has been performed, and selectively re-perform the access operation based on the reference address. The controller re-performs the access operation when the reference address is different from the target address.

Abstract: A nonvolatile memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory regions coupled to a plurality of word lines. The plurality of memory regions include first and second memory regions coupled to upper and lower word lines, respectively. The control logic performs, after receiving first data and second data, a first program operation on the first memory region to store the first data and a second program operation on the second memory region to store the second data.

Abstract: There are provided a memory controller and a memory system including the same. The memory controller includes: a processor for generating a command and an address in response to a request from a host, and generating a bin label and a Log Likelihood Ratio (LLR), based on data received from memory devices; a buffer memory for temporarily storing the data, the bin label, and the LLR; and an error correction circuit for performing error correction decoding on the data, using the LLR.

Abstract: A memory system includes a memory device; and a controller configured to transmit a target address to the memory device for performing an access operation, receive from the memory device a reference address at which the access operation has been performed, and selectively re-perform the access operation based on the reference address. The controller re-performs the access operation when the reference address is different from the target address.

Abstract: A memory system includes a memory device; and a controller configured to transmit a target address to the memory device for performing an access operation, receive from the memory device a reference address at which the access operation has been performed, and selectively re-perform the access operation based on the reference address. The controller re-performs the access operation when the reference address is different from the target address.

Abstract: A memory system and a method for operating the memory system, in which the memory system includes a semiconductor memory device for storing data, and for reading and outputting the stored data in a read operation, and a controller controlling the semiconductor memory device in the read operation, and sequentially performing first and second decoding operations on the data output from the semiconductor memory device, wherein the controller updates and stores a bin label codeword in the second decoding operation, and backs up and stores a start bin label codeword in the bin label codeword.

Abstract: A memory system includes a storage medium including a memory region group having a plurality of memory regions; a memory configured to store a plurality of region read counts respectively corresponding to the plurality of memory regions and a group read count corresponding to the memory region group; a count management circuit configured to, when a first memory region among the plurality of memory regions is read-accessed, based on a first region read count corresponding to the first memory region among the plurality of region read counts, increase the group read count and reduce remaining region read counts other than the first region read count among the plurality of region read counts; and a reliability management circuit configured to perform a reliability management operation for the memory region group, based on the group read count.

Abstract: A memory system includes a storage medium including a memory region group having a plurality of memory regions; a memory configured to store a plurality of region read counts respectively corresponding to the plurality of memory regions and a group read count corresponding to the memory region group; a count management circuit configured to, when a first memory region among the plurality of memory regions is read-accessed, based on a first region read count corresponding to the first memory region among the plurality of region read counts, increase the group read count and reduce remaining region read counts other than the first region read count among the plurality of region read counts; and a reliability management circuit configured to perform a reliability management operation for the memory region group, based on the group read count.

Abstract: There are provided a memory controller and a memory system including the same. The memory controller includes: a processor for generating a command and an address in response to a request from a host, and generating a bin label and a Log Likelihood Ratio (LLR), based on data received from memory devices; a buffer memory for temporarily storing the data, the bin label, and the LLR; and an error correction circuit for performing error correction decoding on the data, using the LLR.

Abstract: A memory system includes a memory device; and a controller configured to transmit a target address to the memory device for performing an access operation, receive from the memory device a reference address at which the access operation has been performed, and selectively re-perform the access operation based on the reference address. The controller re-performs the access operation when the reference address is different from the target address.

Abstract: There are provided a memory system and a method for operating the same. A memory system includes: a semiconductor memory device for storing data, and reading and outputting the stored data in a read operation; and a controller controlling the semiconductor memory device in the read operation, and sequentially performing first and second decoding operations on the data output from the semiconductor memory device, wherein the controller updates and stores a bin label codeword in the second decoding operation, and backs up and stores a start bin label codeword in the bin label codeword.

Abstract: A method of operating a data storage device includes setting program verify voltages for verifying whether memory cells of a nonvolatile memory device are programmed to desired program states; transmitting the set program verify voltages to the nonvolatile memory device; generating data patterns respectively corresponding to program states based on the program verify voltages; transmitting a data pattern corresponding to the program verify voltages to the nonvolatile memory device; and programming the memory cells with the transmitted data pattern.

Abstract: A method of operating a semiconductor device includes storing LSB data in a LSB page included in plural pages of corresponding word line group of a first memory block, generating a data combination signal by combining plural sets of LSB data after the step of storing LSB data, storing the data combination signal in a second memory block, and storing MSB data in a MSB page included in the plural pages.

Abstract: A method of operating a semiconductor device includes storing LSB data in a LSB page included in plural pages of corresponding word line group of a first memory block, generating a data combination signal by combining plural sets of LSB data after the step of storing LSB data, storing the data combination signal in a second memory block, and storing MSB data in a MSB page included in the plural pages.