Patents by Inventor Yong Ju Chon

Yong Ju Chon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Redundancy circuit
    Patent number: 7573763
    Abstract: A redundancy circuit can include a first fuse set that is configured to receive an address signal and an initializing signal activated when power is up, and to output a first redundancy signal, the first redundancy signal being used to repair a defective cell by using a laser beam radiating method, a second fuse set that is configured to receive the initializing signal, a specific address signal, a test mode signal that is activated when a defective cell exists, and the address signal, and to output a second redundancy signal, the second redundancy signal being used to repair the defective cell by using an electrical fusing method, a first memory cell array that is controlled by the first redundancy signal, and a second memory cell array that is controlled by the second redundancy signal.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: August 11, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Hyuk Im, Yong Ju Chon
  • REDUNDANCY CIRCUIT
    Publication number: 20080304341
    Abstract: A redundancy circuit can include a first fuse set that is configured to receive an address signal and an initializing signal activated when power is up, and to output a first redundancy signal, the first redundancy signal being used to repair a defective cell by using a laser beam radiating method, a second fuse set that is configured to receive the initializing signal, a specific address signal, a test mode signal that is activated when a defective cell exists, and the address signal, and to output a second redundancy signal, the second redundancy signal being used to repair the defective cell by using an electrical fusing method, a first memory cell array that is controlled by the first redundancy signal, and a second memory cell array that is controlled by the second redundancy signal.
    Type: Application
    Filed: December 17, 2007
    Publication date: December 11, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Jae Hyuk Im, Yong Ju Chon