Patents by Inventor Yong-Kang Wang

Yong-Kang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240172370
    Abstract: A circuit board with anti-corrosion properties, a method for manufacturing the circuit board, and an electronic device are provided. The circuit board includes a circuit substrate, a first protective layer, and a second protective layer. The circuit substrate includes a base layer and an outer wiring layer formed on the base layer. The circuit substrate further defines a via hole connected to the outer wiring layer. The first protective layer is formed on the outer wiring layer and an inner sidewall of the via hole, and is made of a white oil. The second protective layer is formed on the first protective layer.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Inventors: LI-PING WANG, Yung-Ping Lin, Yong-Kang Zhang, Qiu-Ri Zhang, You-Zhi Lu
  • Patent number: 11943875
    Abstract: A circuit board with anti-corrosion properties, a method for manufacturing the circuit board, and an electronic device are provided. The circuit board includes a circuit substrate, a first protective layer, and a second protective layer. The circuit substrate includes a base layer and an outer wiring layer formed on the base layer. The circuit substrate further defines a via hole connected to the outer wiring layer. The first protective layer is formed on the outer wiring layer and an inner sidewall of the via hole, and is made of a white oil. The second protective layer is formed on the first protective layer.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: March 26, 2024
    Assignee: CHAMP TECH OPTICAL (FOSHAN) CORPORATION
    Inventors: Li-Ping Wang, Yung-Ping Lin, Yong-Kang Zhang, Qiu-Ri Zhang, You-Zhi Lu
  • Patent number: 6236114
    Abstract: A bonding pad is described. A substrate having integrated circuits formed therein is provided. A dielectric layer having several trench structure formed therein is formed over the substrate, and each trench structure has several trenches radially arranged in the dielectric layer. A conductive layer is formed on the dielectric layer and fills the trenches, and the conductive layer is electrically coupled to the integrated circuits in the substrate through the trenches, respectively. By using the invention, the adhesion of the dielectric layers and the metal layers can be greatly improved and the compressive mechanical stress can be uniformly released to the substrate even if the wire width of the integrated circuit is reduced to the sub-micron level.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: May 22, 2001
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Min-San Huang, Huan-Sung Fu, Ling-Sung Wang, Yong-Kang Wang, Jyh-Ren Wu, Shung-Bing Yang