Abstract: A semiconductor device including a semiconductor substrate, a device isolation region formed by filling a trench in the semiconductor substrate with dielectric material and defining device regions in the semiconductor substrate. The trench has a rounded upper edge, and a dummy thin layer formed on the rounded upper edge.

Abstract: Embodiments relate to a passivation fabricating method. In the passivation fabricating method according to embodiments, a first oxide film may be formed by repeating deposition and etching of an oxide film on a silicon substrate in which an upper metal pad may be formed and a second oxide film may be formed by performing only deposition on the first oxide film. A thickness of the first oxide film may be set to be above 5 k?. A first passivation layer may be formed by planarizing the first and second oxide films. In the planarizing process, a thickness of the first passivation layer may be 4 k?. A second passivation layer of a nitride film may be formed on the first passivation layer and the first and second passivations may be selectively etched so as to expose the upper metal pad.

Abstract: Embodiments relate to a high voltage semiconductor device and a method for manufacturing the same. According to embodiments, a semiconductor transistor device may include a substrate made of impurities of a first conductivity, an LDD region made of low concentration impurities of a second conductivity doped in the substrate to reach a prescribed depth from one surface of the substrate, a drain region made of high concentration impurities of the second conductivity doped in the LDD region to reach a prescribed depth from a surface of the LDD region, a source region made of high concentration impurities of the second conductivity doped in the substrate to reach a prescribed depth from another surface of the substrate, a gate poly layer formed on a center surface of the substrate via a gate oxide layer, wherein upper portions of the source and drain regions are positioned lower than the surface of the substrate, which is positioned at a lower portion of the gate oxide layer.

Abstract: Semiconductor device fabrication methods include forming an oxide layer on a semiconductor substrate, forming an arrangement trench on the semiconductor substrate by patterning the oxide layer and the semiconductor substrate, forming a nitride layer on the arrangement trench and the oxide layer, forming a field trench on the semiconductor substrate by patterning the nitride layer, oxide layer, and the semiconductor substrate, and forming a pad oxide layer on inner walls of the field trench. The methods may also include removing the pad oxide layer on a bottom wall of the field trench, injecting ions into the bottom wall of the field trench so as to form an ion injected region, forming a buried layer by diffusing the ion injected region, and forming an epitaxial layer on the buried layer.

Abstract: A semiconductor device including a semiconductor substrate, a device isolation region formed by filling a trench in the semiconductor substrate with dielectric material and defining device regions in the semiconductor substrate. The trench has a rounded upper edge, and a dummy thin layer formed on the rounded upper edge.