Abstract: The present application relates to the technical field of road infrastructure, and provides a cement-based pervious pavement structure, a manufacturing method of the cement-based pervious pavement structure, and an application of the cement-based pervious pavement structure. The cement-based pervious pavement structure includes: a lower structural layer as the base; an upper surfacing layer overlaid on said lower structural layer and including: 1.0-2.0 parts by weight of upper layer (fine) aggregate; 0.40-0.70 part by weight of cement; 0.02-0.03 part by weight of titanium dioxide; 0.03-0.04 part by weight of water reducing agent; 0.001-0.002 part by weight of defoamer. The cement-based pervious pavement structure provided by the present application can provide air purification function taking into account the practical cost.

Abstract: Aspects of the disclosure are directed to a method for use on a blockchain network that includes an accounting node subnetwork having accounting nodes configured to record a data block onto a blockchain and a service node having service nodes configured to verify data blocks recorded by the accounting nodes onto the blockchain. The method can include generating a signature based on transaction information to be included in a data block to be added onto the blockchain by using a key specific to the accounting node. The method can further include adding the transaction information and the generated signature to the data block and adding the data block onto the blockchain, and transmitting the signature to the service nodes in the service node subnetwork, so that the service nodes perform signature verification on the signature based on the key specific to the accounting node.

Abstract: This application provide a data management method for a blockchain system, a medium, and an electronic device. The system includes an accounting node sub-network and a service node sub-network. The method includes: adding, after an accounting node generates a first data block, first key information used for verifying a block header of a second data block generated after the first data block to a block header of the first data block; generating a signature corresponding to the first data block, and adding the signature corresponding to the first data block to the block header of the first data block; and releasing the block header of the first data block to the service node sub-network, to cause a service node to verify the signature included in the block header of the first data block, and obtaining the first key information after a successful verification to verify the block header of the second data block.

Abstract: The present invention relates to a network packet relay device including a time synchronization module for synchronizing a time of a packet with a timestamp value of a network device, and a packet timestamp assigning method thereof, wherein a timestamp having accuracy of a UTC-format nanosecond level can be assigned to the packet at a hardware level by correcting overflow of a register of an elapsed-time counter of a processor of a switch even when the overflow occurs.

Abstract: The present disclosure provides a modified binder for use in an electrochemical cell that cycles lithium ions. The modified binder includes one or more agglomerates of polytetrafluoroethylene nanoparticles, where each of the polytetrafluoroethylene nanoparticles includes a polytetrafluoroethylene core and a polymeric shell that is disposed on exposed surfaces of the core. The polymeric shell can include a polymer selected from the group consisting of: polyethylene oxide, polyglycidyl methacrylate, polyvinylidene difluoride, fluoride-hexafluoropropylene, polypropylene oxide, polyacrylonitrile, polymethacrylonitrile, polymethyl methacrylate, derivatives and co-polymers, and combinations thereof, and in certain instances, also a humidity tolerant lithium salt.

Abstract: The present invention provides a stretchable ACF, a method for manufacturing same, and an interfacial bonding member and a device comprising same. The stretchable ACF comprises: a polymer film; and conductive particles inserted into the polymer film and aligned therein, wherein the conductive particles are exposed to the outside of the upper and lower surfaces of the polymer film.

Abstract: A method for fabricating a dual-layer capacitive cabode electrode includes fabricating a first film including capacitive active material; fabricating a second film including cathode active material; hot jointing the first film and the second film to create a cabode film; and laminating the cabode film onto opposite sides of a current collector using conductive adhesive.

Abstract: A trim assembly is provided with a first trim member having a first finished surface and a second surface opposite thereto, a second trim member in contact with the second surface of the first trim member and attached to the first trim member via a first join, and a third trim member in contact with the second trim member and attached to the second trim member via a second join, the second join unaligned with the first join. The third trim member extends outwardly from the second trim member to a distal end having a first retainer. An assembly with a seat member and a trim assembly, and a seat are provided. In various non-limiting examples, the trim assembly may provide the desired shape of the seat, maintain durability and appearance, prevent looseness, and allow for use of a common seat member with trim assemblies of various appearances.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region, a first contact plug connected to the source/drain region through the first interlayer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second interlayer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region, a first contact plug connected to the source/drain region through the first interlayer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second interlayer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug.

Abstract: An apparatus for an artificial intelligence neural network based on co-evolving neural ordinary differential equations (NODEs) includes a main NODE module configured to provide a downstream machine learning task; and an attention NODE module configured to receive the downstream machine learning task and provide attention to the main NODE module, in which the main NODE module and the attention NODE module may influence each other over time so that the main NODE module outputs a multivariate time-series value at a given time for an input sample x.

Abstract: Configuration of signal strength calibration offset is provided. A user interface is displayed, to a screen of a mobile device, for configuration of a signal strength offset of a wireless transceiver to a vehicle, the signal strength offset being an offset with respect to a default calibration of signal strength measurements between the wireless transceiver and the vehicle, the signal strength calibration being for use in calibrating a location of the mobile device for a passive zone with respect to the vehicle. An update to the signal strength calibration is received from the user interface. The signal strength calibration as updated is sent to the vehicle for use in locating the mobile device for the passive zone.

Abstract: In one aspect, a method can include forming, by self-aligned multiple patterning, a first pattern of regularly spaced mandrels on a layer to be patterned; forming hard mask spacers on sidewalls of the mandrels, thereby forming a second pattern formed of assemblies comprising a mandrel and hard mask spacers on sidewalls thereof; and etching the second pattern in the layer to be patterned.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region, a first contact plug connected to the source/drain region through the first interlayer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second interlayer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region with an etch stop layer interposed therebetween, a first contact plug connected to the source/drain region through the first interlayer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second interlayer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug.

Abstract: Disclosed by the present invention are an anti-human interleukin 17A monoclonal antibody and an application thereof. The epitope of the monoclonal antibody binding to human interleukin 17A comprises 78th asparagine (N78). The antibody may be used to treat rheumatoid arthritis, psoriasis, multiple sclerosis, psoriatic arthritis, plaque psoriasis and/or ankylosing spondylitis.

Abstract: In one aspect, a method can include forming, by self-aligned multiple patterning, a first pattern of regularly spaced mandrels on a layer to be patterned; forming hard mask spacers on sidewalls of the mandrels, thereby forming a second pattern formed of assemblies comprising a mandrel and hard mask spacers on sidewalls thereof; and etching the second pattern in the layer to be patterned.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer, and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region, a first contact plug connected to the source/drain region through the first inter layer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second inter layer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug. An interval between the first contact plug and the second contact plug may be about 10 nm or less.