Abstract: An apparatus and method for embedding and extracting digital watermarks using a blind mode based on wavelet transform which is robust to external attacks while being capable of minimizing a degradation in picture quality caused by embedding of the watermarks. In accordance with the invention, watermarks protection of the copyright for desired data are embedded in DC component domains of wavelet-transformed domains. In accordance with the invention, embedding of watermarks in a target image corresponding to a target domain in which the watermarks are to be embedded, is achieved by generating a data stream of the watermarks in accordance with a key value selected by the user, generating index information representing positions where the watermarks are to be embedded, in accordance with a key value selected by the ser, and reflecting the watermark data stream on data values of pixels in the target image at the positions based on the index information.

Abstract: An apparatus and method for embedding and extracting digital watermarks based on wavelets which is robust to external attacks while being capable of minimizing a degradation in picture quality caused by embedding of the watermarks. The embedded watermarks embedded in DC component domains of wavelet-transformed domains can be robust to external attacks such as compression. The high-frequency dependency of pixels in a DC component domain determined as a target domain, in which watermarks are to be embedded, is calculated, in order to embed the watermarks in the target domain in the order of pixels having a higher high-frequency dependency. Accordingly, there is an advantage in that it is possible to minimize a degradation in picture quality caused by the embedding of watermarks in the DC component domain.

Abstract: A mask ROM device, which is synchronously operable with an external clock signal, has a single word mode or a double word mode. A word decoder and a selection circuit are provided to the mask ROM device, wherein, during a read operation of the single word mode, the word decoder holds a word signal at a disable interval of an internal clock signal earlier by 2 clock cycles than a clock cycle corresponding to a predetermined CAS latency after an occurrence of a read command, and the selection circuit transfers one of higher and lower data corresponding to columns selected by a column selection circuit to an output buffer circuit in response to selection signals generated by the word decoder, and then consecutively transfers the remaining one of the data thereto. According to such a control manner, word data can be accessed without a collision with previously outputted data, or pausing after it.

Abstract: A memory comprising a plurality of memory blocks having a plurality of memory cells and wordlines, each of the memory blocks having selection lines by which the memory blocks are selected. The selection lines are shared between neighboring blocks. In addition, a wordline switching circuit is coupled between conductors carrying wordline drive signals and the wordlines, and a block selection line circuit is coupled between conductors carrying the block selection lines signals and the block selection lines. A selection control circuit supplies selection control signals to the wordline switching circuit and the block selection line switching circuit. The selection control circuit generates the selection control signals in response to address informing signals. The selection lines are coupled to discharge circuits, which pull down voltage levels of selection lines that are not selected.

Abstract: A sense amplifier increases the differential voltage between a reference signal and a sense signal by using a current mirror to control the generation of the reference signal and the sense signal responsive to a common control signal. The sense amplifier includes a reference signal generator for generating the reference signal at a reference node responsive to a reference cell, a sense signal generator for generating the sense signal at a sense node responsive to the state of a memory cell, and a differential amplifier for amplifying the voltage difference between the reference signal and the sense signal. The reference node is coupled to the reference cell which discharges current from the reference node, and the sense node is coupled to the memory cell which discharges current from the sense node. The reference signal generator includes a first current source transistor that is coupled between a power supply terminal and the reference node.

Abstract: A hinge device for connecting a main body and a display unit of a portable computer includes a projection, a hinge member, and attachment units. The projection extends from a lower edge of the display unit, and the hinge member extends outwardly from both sides of the projection and connects to respective attachment units. A groove for receiving an end portion of hinge member is formed in each attachment unit. Each groove has a shape that is complementary to the shape of the end portion of the hinge member, so that the end portion of the hinge member easily inserts into the groove. In a preferred embodiment, one attachment unit is fixedly installed on the main body of the computer, and the other attachment unit is detachably connected to the main body. The attachment units and projection define a pivot axis about which the display unit rotates relative to the main body.