Patents by Inventor Yong Seung Kim

Yong Seung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144435
    Abstract: Proposed is a method of generating learning data for traffic facilities, which can facilitate recognition of traffic facilities. The method includes the steps of: collecting, by a learning data generation unit, traffic facility sample images; generating, by the learning data generation unit, at least one processed image by processing the collected traffic facility sample images to be recognized as images captured by a camera installed in a vehicle; and generating, by the learning data generation unit, learning data by inserting a background into the generated at least one processed image.
    Type: Application
    Filed: June 22, 2023
    Publication date: May 2, 2024
    Inventors: Yong Jae GWAK, Jae Seung KIM
  • Publication number: 20240136510
    Abstract: A positive electrode active material including a first lithium composite oxide particle including a secondary particle formed by aggregation of one or more primary particles, and a coating oxide occupying at least a part of at least one of surfaces of the secondary particle, grain boundaries between the primary particles, or surfaces of the primary particles, the positive electrode active material satisfying an equation of 1.3?a/b?3.0, wherein a represents a max peak intensity at 2theta=44.75° to 44.80° and b represents a max peak intensity at 2theta=45.3° to 45.6° in X-ray diffraction (XRD) analysis using Cu K? radiation.
    Type: Application
    Filed: May 21, 2023
    Publication date: April 25, 2024
    Inventors: Yu Gyeong CHUN, Moon Ho CHOI, Yoon Young CHOI, Jong Seung SHIN, Yong Hwan GWON, Jin Ho BAE, Ji Won KIM, Sang Hyeok KIM
  • Publication number: 20240126831
    Abstract: A depth-wise convolution acceleration device using an MAC array processor structure according to the present invention may include a data output unit, which receives a data of each row of the image from the data buffer and inputs the data into convolution operation blocks while shifting the data N?1 times according to the kernel size (N×N) and a weight output unit, which receives the kernel data from the kernel buffer and sequentially inputs a weight value constituting the kernel data to each of the row convolution operation blocks, and inputs the weight delaying by N clocks if the row increases as N rows.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 18, 2024
    Inventors: Hyo Seung LEE, Seen Suk KANG, Sang Gil CHOI, Seang Hoon KIM, Yong Wook KWON
  • Publication number: 20240118182
    Abstract: A glass stress test method includes breaking a glass, analyzing a shape of a crack of a broken portion of the glass in a plan view, finding a breakage origin of the glass based on the shape of the crack in the plan view, analyzing a cross-section of the breakage origin, and calculating a stress of the glass based on a cross-sectional analysis result of the breakage origin. The stress of the glass is calculated as a value proportional to a floor constant defined by a condition of a floor surface disposed when the glass is broken.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Inventors: Min Ki KIM, Ji Hyun KO, Yong Kyu KANG, Jinsu NAM, Hyun Seung SEO, JUN HO LEE
  • Publication number: 20240116398
    Abstract: An electrified vehicle includes: a battery; a motor drive device configured to drive a motor through an inverter, based on a voltage of the battery; and a battery controller configured to determine whether to perform output limiting on the battery, based on whether a ratio of regenerative braking is less than or equal to a preset ratio, wherein the ratio of regenerative braking is varied according to an amount of charging of the battery and an amount of discharging of the battery within a preset time interval, and adjust, based on the output limiting being performed on the battery, a derate ratio associated with a battery output limit value.
    Type: Application
    Filed: May 9, 2023
    Publication date: April 11, 2024
    Inventors: Yong Jae Kim, Ki Seung Baek, Jong Gu Lee, Gun Goo Lee, Jeong Han Park
  • Patent number: 11940814
    Abstract: Disclosed herein are a cooperative driving method based on driving negotiation and an apparatus for the same. The cooperative driving method is performed by a cooperative driving apparatus for cooperative driving based on driving negotiation, and includes determining whether cooperative driving is possible in consideration of a driving mission of a requesting vehicle that requests cooperative driving with neighboring vehicles, when it is determined that cooperative driving is possible, setting a responding vehicle from which cooperative driving is to be requested among the neighboring vehicles, performing driving negotiation between the requesting vehicle and the responding vehicle based on a driving negotiation protocol, and when the driving negotiation is completed, performing cooperative driving by providing driving guidance information for vehicle control to at least one of the requesting vehicle and the responding vehicle.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: March 26, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yoo-Seung Song, Joo-Young Kim, Kyoung-Wook Min, Yong-Woo Jo, Jeong-Dan Choi
  • Publication number: 20240099108
    Abstract: A display device includes a substrate including a first surface, a second surface opposite to the first surface, a lateral side meeting the first surface, and an inclined surface between the lateral side and the second surface, a light-emitting element layer above the first surface of the substrate, dams surrounding the light-emitting element layer in plan view, an encapsulating layer covering the light-emitting element layer and the dams, and an organic planarization layer above the encapsulating layer, covering the encapsulating layer and the dams, extending to be adjacent to an edge of the substrate, and having a lateral side that forms an inclination, and that is spaced inwardly from the lateral side of the substrate, wherein a distance between the lateral side of the organic planarization layer and the lateral side of the substrate is less than a planar width of the inclined surface of the substrate.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 21, 2024
    Inventors: Hyo Young MUN, Young Ji KIM, Yong Seung PARK, Yi Seul UM, So Young LEE
  • Publication number: 20240096273
    Abstract: A display device includes: a substrate including a display area and a non-display area surrounding the display area; a light emitting element layer on the display area on the substrate and including a plurality of light emitting elements; and an encapsulating layer on the light emitting element layer and on a portion of the display area and the non-display area; and wherein the substrate comprises an upper surface on which the light emitting element layer is located, a bottom surface opposite to the upper surface, a side surface connected to the upper surface and not parallel to the upper surface, and a first inclined surface connected to the side surface and the bottom surface and not parallel to the side surface and the bottom surface, wherein an edge area of the upper surface of the substrate adjacent to an edge of the substrate, in which a processing trace remains.
    Type: Application
    Filed: July 12, 2023
    Publication date: March 21, 2024
    Inventors: Wan Jung KIM, Dae Sang YUN, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, So Young LEE, Young Hoon LEE
  • Publication number: 20240099105
    Abstract: A display device and method for manufacturing thereof are provided. The display device includes a substrate having a display area and a non-display area, and including an edge, an upper surface having an edge area in which a processing trace remains adjacent to the edge, a bottom surface opposite to the upper surface, a side surface connected to the upper surface and not parallel thereto, and a first inclined surface connected to the side surface and to the bottom surface, a light-emitting element layer above the upper surface of the substrate in the display area, and including light-emitting elements, an encapsulating layer above the light-emitting element layer and corresponding to a portion of the display area and the non-display area, and a protective layer above an outer surface of the substrate, and located on at least one of the bottom surface, the side surface, or the first inclined surface.
    Type: Application
    Filed: May 9, 2023
    Publication date: March 21, 2024
    Inventors: Wan Jung KIM, Dae Sang YUN, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, So Young LEE, Young Hoon LEE
  • Publication number: 20240081139
    Abstract: A display device includes: a substrate comprising an upper surface, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface; and a light emitting element layer on the upper surface of the substrate, wherein the substrate comprises a side surface that meets the upper surface in the through hole, a first surface that meets the bottom surface, a second surface that meets the side surface, and a third surface between the first surface and the second surface, and wherein the first surface and the second surface are spaced apart from each other with the third surface therebetween, and are inclined surfaces.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventors: Hyo Young MUN, Yi Seul UM, Wan Jung KIM, Kyung Ah NAM, Yong Seung PARK, Dae Sang YUN, So Young LEE, Young Hoon LEE
  • Publication number: 20240074258
    Abstract: An electronic device includes a display device, which may be fabricated using a described method. The display device includes a glass substrate including a first surface, a second surface opposite the first surface, and a side surface between the first surface and the second surface, an outermost structure on the first surface of the glass substrate and located adjacent to an edge of one side of the glass substrate, and a display area including a plurality of light emitting areas on the first surface of the glass substrate and located farther from the edge of the one side of the glass substrate than the outermost structure is. A minimum distance from the side surface of the glass substrate to the outermost structure is equal to 130 ?m or less.
    Type: Application
    Filed: May 5, 2023
    Publication date: February 29, 2024
    Inventors: Wan Jung KIM, Dong Jo KIM, Sun Hwa KIM, Young Ji KIM, Chang Sik KIM, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, Dae Sang YUN, Kwan Hee LEE, So Young LEE, Young Hoon LEE, Young Seo CHOI, Sun Young KIM, Ji Won SOHN, Do Young LEE, Seung Hoon LEE
  • Patent number: 11912625
    Abstract: A composition for a FDM 3D printer is disclosed. The composition contains bioglass and a biocompatible polymer resin. In addition, a FDM 3D printer molded article having a laminated strut structure, in which the composition for the FDM 3D printer is injected into four layers, is disclosed.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: February 27, 2024
    Assignees: CG Bio Co., Ltd., BIOALPHA CORPORATION
    Inventors: Jun Young Lim, Yong Bok Kim, Hyun Seung Ryu
  • Publication number: 20230326985
    Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
    Type: Application
    Filed: May 24, 2023
    Publication date: October 12, 2023
    Inventors: Ryong HA, Dongwoo KIM, Gyeom KIM, Yong Seung KIM, Pankwi PARK, Seung Hun LEE
  • Publication number: 20230253449
    Abstract: A semiconductor device includes a lower pattern extending in a first direction and sheet patterns spaced apart therefrom in a second direction, a gate structure on the lower pattern and including a gate insulating layer, a gate spacer, and a gate electrode, a source/drain pattern on the lower pattern and in contact with the sheet patterns and the gate insulating layer, and a first etch blocking pattern between the gate spacer and the source/drain pattern. The gate spacer includes an inner sidewall extending in the third direction, and a connection sidewall extending from the inner sidewall in the first direction. The source/drain pattern includes a semiconductor filling layer on a semiconductor liner layer that is in contact with the sheet pattern and includes a facet surface extending from the connection sidewall. The first etch blocking pattern is in contact with the facet surface and the connection sidewall.
    Type: Application
    Filed: September 26, 2022
    Publication date: August 10, 2023
    Inventors: Dong Suk Shin, Hyun-Kwan Yu, Seok Hoon Kim, Pan Kwi Park, Yong Seung Kim, Jung Taek Kim
  • Patent number: 11688778
    Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: June 27, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ryong Ha, Dongwoo Kim, Gyeom Kim, Yong Seung Kim, Pankwi Park, Seung Hun Lee
  • Publication number: 20230145260
    Abstract: A semiconductor device including: a plurality of fin-shaped patterns spaced apart from each other in a first direction and extending in a second direction on a substrate; a field insulating layer covering sidewalls of the plurality of fin-shaped patterns and disposed between the fin-shaped patterns; a source/drain pattern connected to the plurality of fin-shaped patterns on the field insulating layer, the source/drain pattern including bottom surfaces respectively connected to the fin-shaped patterns, and at least one connection surface connecting the bottom surfaces to each other; and a sealing insulating pattern extending along the connection surface of the source/drain pattern and an upper surface of the field insulating layer, wherein the source/drain pattern includes a silicon-germanium pattern doped with a p-type impurity.
    Type: Application
    Filed: June 3, 2022
    Publication date: May 11, 2023
    Inventors: Yang Xu, Nam Kyu Cho, Seok Hoon Kim, Yong Seung Kim, Pan Kwi Park, Dong Suk Shin, Sang Gil Lee, Si Hyung Lee
  • Publication number: 20230056095
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first active pattern on the first region, a first gate structure having a first width in the first direction, on the first active pattern, a first epitaxial pattern disposed in the first active pattern on a side surface of the first gate structure, a second active pattern on the second region, a second gate structure having a second width greater than the first width in the first direction, on the second active pattern and a second epitaxial pattern disposed in the second active pattern on a side surface of the second gate structure. Each of the first epitaxial pattern and the second epitaxial pattern includes silicon germanium (SiGe), and a first Ge concentration of the first epitaxial pattern is lower than a second Ge concentration of the second epitaxial pattern.
    Type: Application
    Filed: May 2, 2022
    Publication date: February 23, 2023
    Inventors: Nam Kyu CHO, Sang Gil LEE, Seok Hoon KIM, Yong Seung KIM, Jung Taek KIM, Pan Kwi PARK, Dong Suk SHIN, Si Hyung LEE, Yang XU
  • Publication number: 20230058991
    Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.
    Type: Application
    Filed: March 9, 2022
    Publication date: February 23, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yang XU, Nam Kyu CHO, Seok Hoon KIM, Yong Seung KIM, Pan Kwi PARK, Dong Suk SHIN, Sang Gil LEE, Si Hyung LEE
  • Patent number: 11569389
    Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: January 31, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon Seung Yang, Eun Hye Choi, Seung Mo Kang, Yong Seung Kim, Jung Taek Kim, Min-Hee Choi
  • Publication number: 20210408300
    Abstract: A semiconductor device includes a fin-type pattern on a substrate, the fin-type pattern extending in a first direction and protruding from the substrate in a third direction, a first wire pattern on the fin-type pattern, the first wire pattern being spaced apart from the fin-type pattern in the third direction, and a gate electrode extending in a second direction, which is perpendicular to the first and third directions, and surrounding the first wire pattern, the gate electrode including a first portion that overlaps with the fin-type pattern in the second direction and a second portion corresponding to a remainder of the gate electrode except for the first portion.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 30, 2021
    Inventors: Moon Seung YANG, Eun Hye CHOI, Seung Mo KANG, Yong Seung KIM, Jung Taek KIM, Min-Hee CHOI