Patents by Inventor Yong-Su Lee

Yong-Su Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9276086
    Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: March 1, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang-Ho Park, Su-Hyoung Kang, Dong-Hwan Shim, Yoon-Ho Khang, Se-Hwan Yu, Min-Jung Lee, Yong-Su Lee
  • Patent number: 9263467
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: February 16, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD
    Inventors: Sang Ho Park, Yoon Ho Khang, Se Hwan Yu, Yong Su Lee, Chong Sup Chang, Myoung Geun Cha, Hyun Jae Na
  • Patent number: 9252226
    Abstract: Provided is a thin film transistor array panel. The thin film transistor array panel according to exemplary embodiments of the present invention includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: February 2, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Do-Hyun Kim, Yoon Ho Khang, Dong-Hoon Lee, Sang Ho Park, Se Hwan Yu, Cheol Kyu Kim, Yong-Su Lee, Sung Haeng Cho, Chong Sup Chang, Dong Jo Kim, Jung Kyu Lee
  • Publication number: 20150357478
    Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.
    Type: Application
    Filed: August 19, 2015
    Publication date: December 10, 2015
    Inventors: HYUN JAE NA, Yoon Ho Khang, Sang Ho Park, Dong Hwan Shim, Se Hwan Yu, Yong Su Lee, Myoung Geun Cha
  • Patent number: 9147741
    Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: September 29, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun Jae Na, Yoon Ho Khang, Sang Ho Park, Dong Hwan Shim, Se Hwan Yu, Yong Su Lee, Myoung Geun Cha
  • Publication number: 20150214380
    Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
    Type: Application
    Filed: April 3, 2015
    Publication date: July 30, 2015
    Inventors: YONG SU LEE, YOON HO KHANG, DONG JO KIM, HYUN JAE NA, SANG HO PARK, SE HWAN YU, CHONG SUP CHANG
  • Publication number: 20150194534
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: March 24, 2015
    Publication date: July 9, 2015
    Inventors: Yong Su LEE, Yoon Ho KHANG, Dong Jo KIM, Hyun Jae NA, Sang Ho PARK, Se Hwan YU, Chong Sup CHANG, Dae Ho KIM, Jae Neung KIM, Myoung Geun CHA, Sang Gab KIM, Yu-Gwang JEONG
  • Publication number: 20150162420
    Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.
    Type: Application
    Filed: February 17, 2015
    Publication date: June 11, 2015
    Inventors: Sang-Ho PARK, Su-Hyoung KANG, Dong-Hwan SHIM, Yoon-Ho KHANG, Se-Hwan YU, Min-Jung LEE, Yong-Su LEE
  • Patent number: 9048322
    Abstract: A display substrate includes a base substrate, a data line disposed on the base substrate, a gate line crossing the data line, a first insulation layer disposed on the base substrate, an active pattern disposed on the first insulation layer and comprising a channel comprising an oxide semiconductor, a source electrode connected to the channel, and a drain electrode connected to the channel, a second insulation layer disposed on the active pattern, and contacting to the source electrode and the drain electrode, a gate electrode disposed on the second insulation layer, and overlapping with the channel, a passivation layer disposed on the gate electrode and the second insulation layer, and a pixel electrode electrically connected to the drain electrode through a first contact hole formed through the passivation layer and the second insulation layer.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: June 2, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Su Lee, Hyang-Shik Kong, Yoon-Ho Khang, Hyun-Jae Na, Se-Hwan Yu, Myoung-Geun Cha
  • Patent number: 9034691
    Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang
  • Patent number: 9025118
    Abstract: A display substrate includes a base substrate, a switching element, a gate line, a data line and a pixel electrode. Each of the gate line and the data line includes a first metal layer, and a second metal layer directly on the first metal layer. The switching element is on the base substrate, and includes a control electrode and an input electrode or an output electrode. The control electrode includes the first metal layer and excludes the second metal layer, and extends from the gate line. The input electrode or the output electrode includes a second metal layer and excludes the first metal layer. The input electrode extends from the data line. The pixel electrode is electrically connected to the output electrode of the switching element through a first contact hole, and includes a transparent conductive layer.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: May 5, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Kyu Lee, Yoon-Ho Khang, Se-Hwan Yu, Cheol-Kyu Kim, Yong-Su Lee, Chong-Sup Chang, Sang-Ho Park, Su-Hyoung Kang, Hyun-Jae Na, Young-Ki Shin
  • Publication number: 20150108481
    Abstract: A thin film transistor includes a bottom gate electrode, a top gate electrode and an active pattern. The top gate electrode includes a transparent conductive material and overlaps with the bottom gate electrode. A boundary of the bottom gate electrode and a boundary of the top gate electrode are coincident with each other in a cross-sectional view. The active pattern includes a source portion, a drain portion and a channel portion disposed between the source portion and the drain portion. The channel portion overlaps with the bottom gate electrode and the top gate electrode.
    Type: Application
    Filed: August 5, 2014
    Publication date: April 23, 2015
    Inventors: YOON-HO KHANG, DONG-JO KIM, SU-HYOUNG KANG, YONG-SU LEE
  • Patent number: 8987047
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: March 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gab Kim, Yu-Gwang Jeong
  • Publication number: 20150080004
    Abstract: A beamforming apparatus and method for expanding coverage of a control channel are provided, by which neighboring communication devices are classified according to the number of beams that they can receive, and therefore the frequency or period of beam transmission is adjusted to transmit a control channel by a beamforming method. Hence, an overhead reduction and an increase in transmission rate can be achieved, and coverage holes can be prevented.
    Type: Application
    Filed: May 2, 2014
    Publication date: March 19, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Wooram SHIN, Hyun-jae KIM, Yong Su LEE, Anseok LEE, Kwang Jae LIM, DongSeung KWON
  • Patent number: 8983005
    Abstract: A technology is provided capable of improving the efficiency of an OFDM system by obtaining the performance in Bit Error Rate (BER) in a wireless communication using OFDM and determining the minimum FFT input bit that produces a SNR difference of 0.1 dB or below with respect to a theoretical BER graph at a desired performance.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: March 17, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Su Lee, Young-Il Kim, Cheol-Hye Cho, Sung-Hee Kim, Young-Soo Park, Dae-Geun Park, Sun-Sim Chun, Yeon-Joon Chung, Won Ryu
  • Publication number: 20150063090
    Abstract: Disclosed are methods and apparatuses for receiving signals in a wireless communication system. The method may comprise identifying a frame start point based on a received signal; determining a fast Fourier transform (FFT) start point based on the frame start point; reconfiguring the FFT start point in order for the FFT start point to be located within a cyclic prefix (CP) period based on a preconfigured offset value; performing FFT based on the reconfigured FFT start point; and performing, on a result of the FFT, a phase compensation based on the preconfigured offset value. Thus, degradation of channel estimation performances can be prevented.
    Type: Application
    Filed: September 3, 2014
    Publication date: March 5, 2015
    Inventor: Yong Su LEE
  • Patent number: 8963154
    Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: February 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Ho Park, Su-Hyoung Kang, Dong-Hwan Shim, Yoon-Ho Khang, Se-Hwan Yu, Min-Jung Lee, Yong-Su Lee
  • Patent number: 8953518
    Abstract: A method and an apparatus for acquiring initial synchronization in a wireless communication system are provided. A relay station determines whether or not the initial synchronization is acquired, determines a start position of a frame using a peak of an autocorrelation signal detected based on a preamble and a relay-amble (R-amble) received from a base station in the case in which the initial synchronization is not acquired, and determines the start position of the frame using a peak of an autocorrelation signal detected based on the relay-amble received from the base station in the case in which the initial synchronization is acquired.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: February 10, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Su Lee, Dae Geun Park, Young Il Park, Won Ryu
  • Patent number: 8929269
    Abstract: A method of configuring a multicast/broadcast service (MBS) zone in a base station is provided. The method includes determining whether terminals connected for communication are positioned in a boundary area of a cell by calculating positions of the terminals, and deciding an MBS zone of the terminals positioned in the boundary area of the cell.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: January 6, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Yong-Su Lee
  • Patent number: 8912552
    Abstract: A display substrate includes a base substrate; a first metal pattern disposed on the base substrate and comprising a first signal line and a first electrode electrically connected to the first signal line; and a buffer pattern disposed at a corner between a sidewall surface of the first metal pattern and the base substrate.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: December 16, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chong-Sup Chang, Yoon-Ho Khang, Se-Hwan Yu, Yong-Su Lee, Min Kang, Myoung-Geun Cha, Ji-Seon Lee