Patents by Inventor Yong Suk Yoo

Yong Suk Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8525322
    Abstract: A semiconductor package has a first substrate having a plurality of electrically conductive patterns formed thereon. A first semiconductor die is coupled to the plurality of conductive patterns. A second semiconductor die is coupled to the first semiconductor die by a die attach material. A third semiconductor die is coupled to the second semiconductor die by a die attach material. A second substrate having a plurality of electrically conductive patterns formed thereon is coupled to the third semiconductor die. A plurality of contacts is coupled to a bottom surface of the first substrate. A connector jack is coupled to the second substrate. A plurality of leads is coupled to the second semiconductor die by conductive wires.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: September 3, 2013
    Inventors: Yong Woo Kim, Yong Suk Yoo
  • Patent number: 8072058
    Abstract: A semiconductor package has a first substrate having a plurality of electrically conductive patterns formed thereon. A first semiconductor die is coupled to the plurality of conductive patterns. A second semiconductor die is coupled to the first semiconductor die by a die attach material. A third semiconductor die is coupled to the second semiconductor die by a die attach material. A second substrate having a plurality of electrically conductive patterns formed thereon is coupled to the third semiconductor die. A plurality of contacts is coupled to a bottom surface of the first substrate. A connector jack is coupled to the second substrate. A plurality of leads is coupled to the second semiconductor die by conductive wires.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: December 6, 2011
    Assignee: Amkor Technology, Inc.
    Inventors: Yong Woo Kim, Yong Suk Yoo
  • Publication number: 20090045499
    Abstract: A semiconductor package has a first substrate having a plurality of electrically conductive patterns formed thereon. A first semiconductor die is coupled to the plurality of conductive patterns. A second semiconductor die is coupled to the first semiconductor die by a die attach material. A third semiconductor die is coupled to the second semiconductor die by a die attach material. A second substrate having a plurality of electrically conductive patterns formed thereon is coupled to the third semiconductor die. A plurality of contacts is coupled to a bottom surface of the first substrate. A connector jack is coupled to the second substrate. A plurality of leads is coupled to the second semiconductor die by conductive wires.
    Type: Application
    Filed: October 25, 2004
    Publication date: February 19, 2009
    Inventors: Yong Woo Kim, Yong Suk Yoo
  • Patent number: 6853060
    Abstract: A semiconductor package has a substrate comprising a thermosetting resin layer of an approximate planar plate, a plurality of copper patterns formed at top and bottom surfaces of the resin layer, and protective layers coated on predetermined regions of the copper patterns and the thermosetting layer and having a same height at a surface of the resin layer. A semiconductor die is coupled to a center of the top surface of the substrate. A plurality of conductive wires for electrically coupling the semiconductor die to the copper patterns is positioned at the top surface of the resin layer. An encapsulant is used for covering the semiconductor die located at the top surface of the substrate and the conductive wires in order to protect them from the external environment. A plurality of solder balls is coupled to the bottom surface of the substrate.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: February 8, 2005
    Assignee: Amkor Technology, Inc.
    Inventors: Jae Wook Seok, Kyu Won Lee, Yong Suk Yoo