Patents by Inventor Yong Sun JUNG

Yong Sun JUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240078218
    Abstract: The apparatus for validating various kinds of data and a digital twin operation includes a validation target data selector configured to select a target to be validated among various kinds of input data, a data validator configured to validate individual data for each type of data selected for validation, and a data linkage validator configured to validate various kinds of multiple data by linking the various kinds of multiple data in order to detect an error in a process of linking the various kinds of multiple data.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 7, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Myung-Sun BAEK, Young Soo PARK, Yong Tae LEE, Eui Suk JUNG
  • Patent number: 9490259
    Abstract: An anti-fuse, an anti-fuse array and a method of operating the same are disclosed. The anti-fuse array includes: an active region formed in a semiconductor substrate; a slit region formed at both edge portions of the active region in a first direction; a plurality of select gates extending in a second direction perpendicular to the first direction of the active region, and coupled to a select word line; a plurality of first program gates spaced apart from the select gates, formed over the active region isolated by the slit region, and coupled to a first program word line; a plurality of second program gates spaced apart from the select gates, formed over the active region isolated by the slit region, and coupled to a second program word line; and a bit line perpendicular to the select word line.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: November 8, 2016
    Assignee: SK Hynix Inc.
    Inventor: Yong Sun Jung
  • Publication number: 20160300843
    Abstract: An anti-fuse, an anti-fuse array and a method of operating the same are disclosed. The anti-fuse array includes: an active region formed in a semiconductor substrate; a slit region formed at both edge portions of the active region in a first direction; a plurality of select gates extending in a second direction perpendicular to the first direction of the active region, and coupled to a select word line; a plurality of first program gates spaced apart from the select gates, formed over the active region isolated by the slit region, and coupled to a first program word line; a plurality of second program gates spaced apart from the select gates, formed over the active region isolated by the slit region, and coupled to a second program word line; and a bit line perpendicular to the select word line.
    Type: Application
    Filed: July 9, 2015
    Publication date: October 13, 2016
    Inventor: Yong Sun JUNG
  • Patent number: 9305786
    Abstract: A semiconductor device using a small-sized metal contact as a program gate of an antifuse, and a method of fabricating the same are described. The semiconductor device includes a metal contact structure formed on a semiconductor substrate of a peripheral circuit area, and includes a first gate insulating layer to be ruptured. A gate structure is formed on the semiconductor substrate to one side of the metal contact structure.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: April 5, 2016
    Assignee: SK HYNIX INC.
    Inventor: Yong Sun Jung
  • Publication number: 20150170919
    Abstract: A semiconductor device using a small-sized metal contact as a program gate of an antifuse, and a method of fabricating the same are described. The semiconductor device includes a metal contact structure formed on a semiconductor substrate of a peripheral circuit area, and includes a first gate insulating layer to be ruptured. A gate structure is formed on the semiconductor substrate to one side of the metal contact structure.
    Type: Application
    Filed: February 27, 2015
    Publication date: June 18, 2015
    Inventor: Yong Sun JUNG
  • Patent number: 9000528
    Abstract: A semiconductor device using a small-sized metal contact as a program gate of an antifuse, and a method of fabricating the same are described. The semiconductor device includes a metal contact structure formed on a semiconductor substrate of a peripheral circuit area, and includes a first gate insulating layer to be ruptured. A gate structure is formed on the semiconductor substrate to one side of the metal contact structure.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: April 7, 2015
    Assignee: SK hynix Inc.
    Inventor: Yong Sun Jung
  • Patent number: 8878291
    Abstract: A semiconductor device includes a first buried gate structure in a peripheral circuit area of a semiconductor substrate, and a second gate structure formed on the semiconductor substrate. A gate insulating layer of a program transistor is thinly formed to be easily ruptured, and a gate insulating layer of a select transistor is thickly formed to improve reliability of the select transistor.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: November 4, 2014
    Assignee: SK Hynix Inc.
    Inventor: Yong Sun Jung
  • Publication number: 20140054712
    Abstract: A semiconductor device using a small-sized metal contact as a program gate of an antifuse, and a method of fabricating the same are described. The semiconductor device includes a metal contact structure formed on a semiconductor substrate of a peripheral circuit area, and includes a first gate insulating layer to be ruptured. A gate structure is formed on the semiconductor substrate to one side of the metal contact structure.
    Type: Application
    Filed: December 17, 2012
    Publication date: February 27, 2014
    Applicant: SK HYNIX INC.
    Inventor: Yong Sun JUNG
  • Publication number: 20140027844
    Abstract: A semiconductor device includes a first buried gate structure in a peripheral circuit area of a semiconductor substrate, and a second gate structure formed on the semiconductor substrate. A gate insulating layer of a program transistor is thinly formed to be easily ruptured, and a gate insulating layer of a select transistor is thickly formed to improve reliability of the select transistor.
    Type: Application
    Filed: December 13, 2012
    Publication date: January 30, 2014
    Applicant: SK HYNIX INC.
    Inventor: Yong Sun JUNG
  • Publication number: 20120012943
    Abstract: The present invention provides an anti-fuse of a semiconductor device and a method of manufacturing the same, which has a stable current level and a stable operation. According to the present invention, in order for the anti-fuse to be stably operated, a region in which a gate and an active region partially overlap with each other is formed, and the overlapped region is destroyed when voltage is supplied. Accordingly, a current level can be stabilized, and stable operation is possible.
    Type: Application
    Filed: July 12, 2011
    Publication date: January 19, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventor: Yong Sun JUNG