Patents by Inventor Yong T. Lee

Yong T. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5357127
    Abstract: This invention provides an opto-electronic integrated circuit for receiving optical signals as well as method for manufacturing the same in which both the receipt sensitivity and reliability are improved to achieve both high operation speed and process simplicity. This is accomplished by integrating the photo-detector and the amplifier on a single chip, which are essential elements of the optical receiver of the optical communication system. Also, layer between a PIN photo-detector and a junction-field effect transistor (JFET) is shared as large as possible through a two times epitaxial growth. In this way, the opto-electronic integrated circuit is optimized.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: October 18, 1994
    Assignee: Electronics and Telecommunications
    Inventors: Ki S. Park, Kwang Y. Oh, Yong T. Lee
  • Patent number: 5116772
    Abstract: The present invention provides a method for manufacturing a field effect transistor which overcomes problems occurring in the manufacture of InP material junction field effect transistors. Because the electron saturation velocity is higher than that of silicon or GaAs it is desirable to have a gate length shorter than the mask length as well as to have the source, drain, and gate metals evaporated by the self-aligned method. The present invention provides a method of achieving gate lengths of 1 .mu.m or shorter without requiring an expensive electron beam apparatus or X-ray lighography apparatus.
    Type: Grant
    Filed: April 11, 1991
    Date of Patent: May 26, 1992
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ki S. Park, Sang B. Kim, Kwang Y. Oh, Yong T. Lee
  • Patent number: 5116773
    Abstract: The present invention provides a method for manufacturing a field effect transistor which overcomes problems occurring in the manufacture of InP material junction field effect transistors. Because the electron saturation velocity is higher than that of silicon or GaAs it is desirable to have a gate length shorter than the mask length as well as to have the source, drain, and gate metals evaporated by the self-aligned method. The present invention provides a method of achieving gate lengths of 1 .mu.m or shorter without requiring an expensive electron beam apparatus or X-ray lithography apparatus.
    Type: Grant
    Filed: December 26, 1990
    Date of Patent: May 26, 1992
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ki S. Park, Sang B. Kim, Kwang Y. Oh, Yong T. Lee