Abstract: Disclosed herein is vibration motor. The vibration motor includes a bearing rotatably fitted over a support shaft which is installed to be perpendicular to a base. A hub is coupled to the bearing, with an eccentric member provided on the edge of the hub. A coil is mounted to the hub to form an electric field. A magnet having 2n poles is mounted on the base, and rotates the hub using electromagnetic force between the magnet and the coil. A detent magnet is mounted to the hub and stops the coil in the middle between the poles of the magnet.

Abstract: A nonvolatile memory device includes a device isolation film defining an active region in a semiconductor substrate, a pocket well region formed in an upper portion of the active region and having a first conductivity type, a gate electrode formed on the active region and extending to intersect the active region, a tunnel insulating film, a charge storage film, and a blocking insulating film sequentially disposed between the active region and the gate electrode, a source region and a drain region respectively formed in a first region and a second region of the active region exposed on both sides of the gate electrode, and each having a second conductivity type opposite to the first conductivity type, a pocket well junction region formed in the first region adjacent to the source region and contacting the pocket well region, and having the first conductivity type, and a metal silicide layer formed in the first region and contacting the source region and the pocket well junction region.

Abstract: An electrically erasable and programmable read only memory (EEPROM) device and a method of manufacturing the EEPROM device are provided. First and second gate structures having the same structure are formed on a tunnel insulating layer formed on a substrate, such that the first and second gate structures are spaced apart from each other. A common source region is formed at a portion of the substrate located between the first and second gate structures. First and second drain regions are formed at first and second portions of the substrate adjacent to the first and second gate structures, respectively. Thus, the EEPROM device is manufactured including first and second transistors that have the same structure and may alternately serve as a memory transistor and a selection transistor according to an applied signal.

Abstract: A mask read-only memory (ROM) includes parallel doping lines of a second conductivity type formed in a substrate of a first conductivity type, a first insulation film formed on the doping lines and the substrate, conductive pads fainted on the first insulation film, a second insulation film formed on the first insulation film and the conductive pads, parallel wires formed on the second insulation film extending perpendicular to the doping lines, contact plugs formed in the first insulation film that connect the doping lines to the conductive pads, and vias formed in the second insulation film that connect the conductive pads to the wires, wherein crossings of the doping lines and the wires define memory cells, contact plugs and vias are formed in memory cells of a first type, and at least one of the contact plug and via are missing from memory cells of a second type.

Abstract: Disclosed herein is a flat type vibration motor. The motor includes a bracket having a shaft mounted to the central portion of the bracket, with a lower substrate and a magnet being adhered to the upper surface of the bracket. A casing covers the upper portion of the bracket, and defines an internal space. An upper substrate has on a lower surface thereof a commutator. A coil and a weight are adhered to the upper surface of the upper substrate. A resin member is provided on some portion of the upper substrate and has a bearing holding hole. A bearing is held in the bearing holding hole and rotatably supported by the shaft. A brush is secured at a first end thereof to the lower substrate and contacts at a second end thereof to the commutator to form a contact part.

Abstract: There is provided a flat type vibration motor 100 that includes a bracket 150 with a shaft 140 of which one end is inserted into and fixed to the center thereof, a printed circuit board 110 having a terminal portion 130 receiving external electricity and disposed on the side of the bracket 150, a stator disposed on the top of the printed circuit board 110, a rotor 170 rotatably installed in the shaft 140 and generating vibration while rotating by interaction with the stator 160, and a stopper 180 installed at the other end of the shaft 140. The bracket 150 and the shaft 140 are electrically connected with the terminal portion 130. Further, it is possible to use the bracket or a shaft as an external power connection terminal by electrically connecting a negative terminal to the bracket and the shaft through the contact portion.

Abstract: A dual unbalanced indirectly heated cathode (IHC) ion chamber is disclosed. The cathodes have different surface areas, thereby affecting the amount of heat radiated by each. In the preferred embodiment, one cathode is of the size and dimension typically used for IHC ionization, as traditionally used for hot mode operation. The second cathode, preferably located on the opposite wall of the chamber, is of a smaller size. This smaller cathode is still indirectly heated by a filament, but due to its smaller size, radiates less heat into the source chamber, allowing the ion source to operate in cold mode, thereby preserving the molecular structure of the target molecules. In both modes, the unused cathode is preferably biased so as to be at the same potential as the IHC, thus allowing it to act as a repeller.

Abstract: A robot cleaner including a suction hole to suction dust, a blower to generate a suction force to suction the dust, a dust collector to receive the dust suctioned by said suction force through the suction hole, and a rotating brush to sweep up and collect the dust into the dust collector through the suction hole by a drive force of the rotating brush. The dust collector includes a backflow preventing member movable between an open position and a closed position. The backflow preventing member is pivotably rotatable in an air suction direction by the suction force of the blower to the open position and is adapted to return to the closed position to prevent the dust in the dust collector from being discharged through the suction hole upon stoppage of the blower.

Abstract: A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through the tunnel insulation layer. The select gate electrode is insulated from the control gate electrode. According to the non-volatile memory device, a select gate electrode and a control gate electrode are formed on a floating gate, and thus a voltage is applied to the respective gate electrodes to write and erase data.

Abstract: A lithium ion secondary battery in which an electrode assembly is easily impregnated with an electrolyte is provided. The lithium ion secondary battery includes an electrode assembly wrapped by a sealing tape, an upper insulating plate positioned on the top of the electrode assembly, a lower insulating plate positioned at the bottom of the electrode assembly, a case for accommodating the electrode assembly, and a cap assembly for sealing the case. In one embodiment, the upper insulating plate has holes which may include a form of a mesh. In another embodiment, the lower insulating plate has various shapes of recesses on the surface. The surface of the lower insulating plate may be coated with a material that has an affinity for the electrolyte. An inner surface of the case may have various shapes of recesses or grooves. The sealing tape may be coated with a material that has an affinity for an electrolyte.

Abstract: The present invention discloses a home network system using a living network control protocol. The home network system includes: at least one electric device; first and second networks based on a predetermined living network control protocol (LnCP); an LnCP access device connected to the electric device through the second network; and a network manager connected to the LnCP access device through the first network, for controlling and monitoring the electric device.

Abstract: A semiconductor light emitting device includes a substrate; a plurality of light emitting cells disposed on the top surface of the substrate, the light emitting cells each having an active layer; a plurality of connection parts formed on the substrate with the light emitting cells formed thereon to connect the light emitting cells in a parallel or series-parallel configuration; and an insulation layer formed on the surface of the light emitting cell to prevent an undesired connection between the connection parts and the light emitting cell. The light emitting cells comprise at least one defective light emitting cell, and at least one of the connection parts related to the defective light emitting cell is disconnected.

Abstract: A wavelength-converted light emitting diode (LED) chip is provided. The wavelength-converted LED chip includes an LED chip and a wavelength-converted layer. The LED chip emits light in a predetermined wavelength region. The wavelength-converted layer is formed of a resin containing phosphor bodies of at least one kind which convert a portion of the light emitted from the LED chip into light in a different wavelength region. The wavelength-converted layer is formed on an upper surface of the LED chip, and has a convex meniscus-shaped upper surface.

Abstract: A digital broadcasting stream transmitting method and a digital broadcasting stream receiving method and apparatus for providing three-dimensional (3D) video services are provided. The transmitting method including: generating a plurality of elementary streams (ESs) for a plurality of pieces of video information including at least one of information about a base-view video of a 3D video, information about an additional-view video corresponding to the base-view video, and a two-dimensional (2D) video having a different view from views of the 3D video; multiplexing the plurality of ESs with link information for identifying at least one piece of video information linked with the plurality of pieces of video information, to generate at least one transport stream (TS); and transmitting the generated at least one TS via at least one channel.

Abstract: A method and apparatus for generating a data stream for providing a three-dimensional (3D) multimedia service and a method and apparatus for receiving the data stream are provided. The generating method includes: generating at least one elementary stream (ES) including video data of each view from a program for providing a two-dimensional (2D) or 3D multimedia service; generating program map table (PMT) information about the program, including reference information about the at least one ES and 3D additional information for identifying and reproducing the video data of each view; and generating at least one transport stream (TS) by multiplexing packetized elementary stream (PES) packets generated by packetizing the at least one ES, and the PMT information.

Abstract: A method of programming a nonvolatile semiconductor memory device using a negative bias voltage. The method includes turning ON the string selection transistors connected to selected bit lines and turning OFF the string selection transistors connected to unselected bit lines in the same memory block, in a program mode. This can be achieved by applying a negative bias voltage to a bulk substrate and applying a voltage having a voltage level higher than the threshold voltage of string selection transistors connected to selected bit lines and lower than the threshold voltage of string selection transistors connected to unselected bit lines. The method may reduce programming disturbance between a selected cell string and an unselected cell string.

Abstract: A semiconductor device includes transistors with a vertical gate electrode. In a transistor structure, a semiconductor pattern has first and second sides facing in a transverse direction, and third and fourth sides facing in a longitudinal direction. Gate patterns are disposed adjacent to the first and second sides of the semiconductor pattern. Impurity patterns directly contact the third and fourth sides of the semiconductor pattern. A gate insulating pattern is interposed between the gate patterns and the semiconductor pattern.

Abstract: Provided is a semiconductor device for applying common source lines with individual bias voltages. The device includes a substrate, cell transistors arrayed in a cell matrix shape on the substrate and configured to have gate insulating patterns, gate electrodes, common source regions, drain regions and channel regions. Word lines are configured to electrically interconnect the gate electrodes with each other. Common source lines are shared between only a pair of the neighboring word lines and are configured to electrically interconnect the common source regions with each other. Drain metal contacts and source metal contacts are arranged in a straight line on the drain regions. Bit lines are electrically connected to the drain metal contacts. And impurity regions are configured to control the threshold voltage of the channel regions.

Abstract: A semiconductor device has a first semiconductor layer including a first circuit, a second semiconductor layer disposed on the first semiconductor layer and having a second circuit, and a via extending through portions of the first and second semiconductor layers and by which the first and second circuits are electrically connected. One of the circuits is a logic circuit and the other of the circuits is a memory circuit. The semiconductor device is manufactured by fabricating transistors of the logic and memory circuits on respective substrates, stacking the substrates, and electrically connecting the logic and memory circuits with a via.

Abstract: Disclosed are a plug interlock device for a circuit breaker and a circuit breaker having the same, wherein a plug is not allowed to be separated from a connector while a breaker main body is moved from a test position to a run position or is running at the run position, thereby obviating the plug from being unexpectedly unplugged from the connector while the breaker main body is moved from the test position to the run position or is running, resulting in preventing a safety accident in advance.