Patents by Inventor Yong Tan

Yong Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10409525
    Abstract: A memory management method for a rewritable non-volatile memory module is provided. The method includes: selecting at least one first physical erasing unit from at least part of physical erasing units according to a first parameter. The method further includes: selecting a second physical erasing unit from the at least one first physical erasing unit according to a second parameter, wherein the second parameter is different from the first parameter; and copying at least part of data stored in the second physical erasing unit to a third physical erasing unit.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: September 10, 2019
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Publication number: 20190251539
    Abstract: The present disclosure relates to methods and systems for conducting a transaction. The method comprises the steps of pairing a multi-sensory interactive point of sale with a mobile device at a first time. The step of pairing comprises the steps of receiving a transaction initiation instruction comprising identification data of a customer and an identifier associated with the multi-sensory interactive point of sale and transmitting authentication information to a mobile terminal registered to the customer based on the received identification data. The method further comprises the step of receiving a transaction selection. The method further comprises the step of processing a payment at a second time, wherein receiving the transaction selection occurs between the first time and the second time.
    Type: Application
    Filed: January 24, 2019
    Publication date: August 15, 2019
    Inventors: Bensam Joyson, Xijing Wang, Donghao Huang, Teck Yong Tan, Hao Tang, Muhammad Azeem, Zunhua Wang, Anupam Sharma, Shiying Lian
  • Patent number: 10338854
    Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. In an exemplary embodiment, the memory management method includes: receiving a first write command and first write data and obtaining a first number; programming the first write data and moving first storage data stored in a plurality of first physical programming units, where a total number of the first physical programming units conforms to the first number; receiving a second write command and second write data and obtaining a second number; programming the second write data and moving second storage data stored in a plurality of second physical programming units, where a total number of the second physical programming units conforms to the second number; and erasing at least one physical erasing unit. Accordingly, waste of system resource in the data merging procedure may be reduced.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: July 2, 2019
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Kok-Yong Tan, Horng-Sheng Yan
  • Patent number: 10191659
    Abstract: A data access method for a memory storage device is provided. The memory storage device includes a rewritable non-volatile memory module and a buffer memory. The method includes: receiving at least one operation command including at least one read command; and counting an amount of accumulative data of the at least one read command, and if the amount of accumulative data reaches a data threshold, writing the data in the buffer memory into the rewritable non-volatile memory module.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: January 29, 2019
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Patent number: 10101914
    Abstract: A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes receiving an adjust command from a host system, wherein the adjust command is configured to indicate that data stored in at least one logical unit of a plurality of logical units is invalid; updating a logical address status table according to the adjust command, wherein the logical address status table reflects a data status of the data stored in each of the logical units, wherein the data status includes a first state or a second state; and updating a physical address status table according to the logical address status table and the physical address status table if a predetermined condition is met, wherein the physical address status table reflects a data status of data stored in each of a plurality of physical programming units.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: October 16, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Kok-Yong Tan, Horng-Sheng Yan
  • Patent number: 9965400
    Abstract: A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes using a first management mode to manage the rewritable non-volatile memory module after the rewritable non-volatile memory module is powered on; and using a second management mode to manage the rewritable non-volatile memory module if a shut down command is received from a host system, wherein the second management mode is different from the first management mode and the second management mode executes at least one mandatory processing procedure in background.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: May 8, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Patent number: 9946478
    Abstract: A memory managing method, a memory control circuit unit and a memory storage apparatus are provided. The method includes: setting a read-disturb threshold for each of a plurality of physical erasing units; adjusting the read-disturb threshold of a first physical erasing unit according to state information of a rewritable non-volatile memory module; and performing a read-disturb prevention operation according to the read-disturb threshold of the first physical erasing unit.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: April 17, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Publication number: 20180101838
    Abstract: A method and system for facilitating mobile payment for products includes: receiving a first container identifier encoded on a first container tag attached to a physical container for holding the products; receiving a wallet identifier corresponding to a digital wallet installed on a mobile device; linking a virtual container associated with the first container identifier to the digital wallet through the wallet identifier; receiving, from a checkout device, (i) a product identifier encoded on a product tag attached to each of the products held in the physical container and (ii) a second container identifier encoded on a second container tag attached to the physical container; and, when the first and the second container identifiers are identical, populating the virtual container with virtual products corresponding to each of the product identifiers received from the checkout device such that the mobile payment of the products can be made using the digital wallet.
    Type: Application
    Filed: October 6, 2017
    Publication date: April 12, 2018
    Inventors: Teck Yong Tan, Yong How Chin, Noor Ali Nizar Ali, Xijing Wang, Tobias Puehse
  • Patent number: 9919136
    Abstract: A catheter assembly includes a catheter hub having an elastomeric septum that divides the catheter hub into a distal chamber and a proximal chamber. The septum also includes at least one slit that is closed and sealed when the septum is in an at-rest state. A septum activator is proximal the septum. When an external force pushes the activator against the septum, the activator deforms the septum so as to break the seal and create a flow path through the septum. A portion of the septum activator can be collapsible when subjected to the outside force. When the outside force is removed, the collapsible portion springs back to its at-rest shape, helping to pull the activator out of deforming engagement with the septum so that the septum can reseal. The activator can also be spring-biased away from engagement with the septum so that when the outside force is removed, the spring urges the activator out of engagement with the septum. With the activator removed, the septum slit can reseal.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: March 20, 2018
    Assignee: B. Braun Melsungen AG
    Inventors: Siew Ping Lim, E-Jen Teh, Soo Yong Tan, Teng Sun Teoh
  • Patent number: 9890844
    Abstract: A forcipate gear open-close mechanism comprises a circular base spliced by two parts, an annular gear spliced by two parts, and an open-close device for driving the circular base and the annular gear to open or close. An annular guide rail formed by splicing is arranged on the circular base; the annular gear is mounted on the annular guide rail; and a power transmission device drives the annular gear to rotate along the annular guide rail. The annular gear and the circular ring-shaped base are each spliced by two parts; therefore, the gear mechanism can be clamped on an iron core conveniently, and a coil can be wound on a three-dimensional iron core conveniently. Moreover, the gear mechanism can not only be clamped on an iron core, but also be clamped on a columnar iron core.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: February 13, 2018
    Assignee: NEWONDER SPECIAL ELECTRIC CO., LTD.
    Inventor: Yong Tan
  • Patent number: 9875027
    Abstract: A data transmitting method for a memory storage device is provided. The method includes: detecting a temperature of the memory storage device; and determining whether the temperature of the memory storage device is greater than a temperature threshold. If the temperature is greater than the temperature threshold, first data is written into a rewritable non-volatile memory module within a first delay time according to a delay count corresponding to a unit temperature.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 23, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Patent number: 9772797
    Abstract: A buffer memory management method, a memory control circuit unit and a memory storage device are provided. The method includes allocating a first zone and a second zone in the buffer memory for temporarily storing a plurality of logical address-physical address mapping tables and performing a restore operation on the first zone. The method also includes receiving a write command, wherein a logical address-physical address table to which a logical address indicated by the write command belongs has been temporarily stored in the first zone. The method further includes copying the logical address-physical address table into the second zone, and updating the logical address-physical address table in the second zone.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: September 26, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Publication number: 20170269873
    Abstract: A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes using a first management mode to manage the rewritable non-volatile memory module after the rewritable non-volatile memory module is powered on; and using a second management mode to manage the rewritable non-volatile memory module if a shut down command is received from a host system, wherein the second management mode is different from the first management mode and the second management mode executes at least one mandatory processing procedure in background.
    Type: Application
    Filed: April 28, 2016
    Publication date: September 21, 2017
    Inventor: Kok-Yong Tan
  • Publication number: 20170262197
    Abstract: A memory managing method, a memory control circuit unit and a memory storage apparatus are provided. The method includes: setting a read-disturb threshold for each of a plurality of physical erasing units; adjusting the read-disturb threshold of a first physical erasing unit according to state information of a rewritable non-volatile memory module; and performing a read-disturb prevention operation according to the read-disturb threshold of the first physical erasing unit.
    Type: Application
    Filed: May 4, 2016
    Publication date: September 14, 2017
    Inventor: Kok-Yong Tan
  • Publication number: 20170255389
    Abstract: A data transmitting method for a memory storage device is provided. The method includes: detecting a temperature of the memory storage device; and determining whether the temperature of the memory storage device is greater than a temperature threshold. If the temperature is greater than the temperature threshold, first data is written into a rewritable non-volatile memory module within a first delay time according to a delay count corresponding to a unit temperature.
    Type: Application
    Filed: April 28, 2016
    Publication date: September 7, 2017
    Inventor: Kok-Yong Tan
  • Patent number: 9733832
    Abstract: A method for accessing a buffer memory in a memory storage device is provided, wherein the buffer memory, which has a plurality of write buffer units, is equipped in the memory storage device having a rewritable non-volatile memory module. The method includes: receiving a write data from a host system and determining whether the number of used write buffer unit is smaller than a predefined value or not. The method also includes: if the number of the used write buffer unit is not smaller than the predefined value, temporarily storing the write data into one of the write buffer unit which is not being used and transmitting a confirmation message corresponding to the write data to the host system after a predefined time interval. Therefore, the method can reduce the latency of write operations of the host system.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: August 15, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Publication number: 20170228162
    Abstract: A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes receiving an adjust command from a host system, wherein the adjust command is configured to indicate that data stored in at least one logical unit of a plurality of logical units is invalid; updating a logical address status table according to the adjust command, wherein the logical address status table reflects a data status of the data stored in each of the logical units, wherein the data status includes a first state or a second state; and updating a physical address status table according to the logical address status table and the physical address status table if a predetermined condition is met, wherein the physical address status table reflects a data status of data stored in each of a plurality of physical programming units.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 10, 2017
    Inventors: Kok-Yong Tan, Horng-Sheng Yan
  • Patent number: 9717887
    Abstract: A catheter assembly includes a catheter hub and an introducer needle. The introducer needle extends through the catheter hub and through a catheter tube so as to assist placement of the catheter tube into a patient's blood vessel. Blood flashback into the catheter tube and/or catheter hub can indicate when the catheter tube is properly positioned within the blood vessel. After proper catheter tube placement is confirmed through blood flashback, the introducer needle is withdrawn. A septum blocks flashback blood from flowing proximally out of the catheter hub. One or more air vents enable air within the hub to vent when flashback blood enters the catheter hub. A porous hydrophobic material covers the one or more air vents. The hydrophobic material allows the air to flow therethrough and through the vents, but repels blood, blocking blood from flowing through the air vents.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: August 1, 2017
    Assignee: B. Braun Melsungen AG
    Inventor: Soo Yong Tan
  • Patent number: 9720609
    Abstract: A data protecting method for a rewritable non-volatile memory module is provided. The method includes assigning a plurality of physical pages into a plurality of encoding groups to group a first physical page to a first encoding group and group a second physical page to a second encoding group, where each of the physical pages stores user data and a parity code corresponding to the user data, the first physical page is composed of memory cells of a first word line, and the second physical page is composed of memory cells of a second word line adjacent to the first word line. The method also includes respectively encoding the user data in the physical pages of the encoding groups for generating a plurality of group parity codes respectively corresponding to the encoding groups.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: August 1, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Horng-Sheng Yan, Kok-Yong Tan
  • Patent number: 9665481
    Abstract: A wear leveling method for a rewritable non-volatile memory module is provided. The method includes: recording a timestamp for each of physical erasing units storing valid data according to a programming sequence of the physical erasing units storing valid data among the physical erasing units, and recording an erase count for each of physical erasing units. The method also includes: selecting a first physical erasing unit from the physical erasing units storing valid data according to the timestamps, selecting a second physical erasing unit from physical erasing units not storing valid data among the physical erasing units according to the erase counts, and writing valid data of the first physical erasing unit into the second physical erasing unit, and marking the first physical erasing unit as a physical erasing unit not storing valid data.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: May 30, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan