Patents by Inventor Yong-Wang Liu

Yong-Wang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual phase-locked loop circuit and method for controlling the same
    Patent number: 8564340
    Abstract: A dual phase-locked loop (PLL) circuit includes a phase/frequency detector, a charge pump, a frequency tuning circuit and an N divider. The frequency tuning circuit includes a coarse-tuning circuit, for coarse-tuning an output frequency of the dual PLL circuit to approximate a target frequency; a fine-tuning circuit, for fine-tuning the output frequency of the dual PLL circuit to the target frequency; and a current control oscillator (CCO), for generating an output signal of the dual PLL circuit. The output frequency of the output signal is equal to the target frequency.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: October 22, 2013
    Assignee: MStar Semiconductor, Inc.
    Inventors: Yong-Wang Liu, Wen-cai Lu, Sterling Smith
  • Dual Phase-Locked Loop Circuit and Method for Controlling the Same
    Publication number: 20110006820
    Abstract: A dual phase-locked loop (PLL) circuit includes a phase/frequency detector, a charge pump, a frequency tuning circuit and an N divider. The frequency tuning circuit includes a coarse-tuning circuit, for coarse-tuning an output frequency of the dual PLL circuit to approximate a target frequency; a fine-tuning circuit, for fine-tuning the output frequency of the dual PLL circuit to the target frequency; and a current control oscillator (CCO), for generating an output signal of the dual PLL circuit. The output frequency of the output signal is equal to the target frequency.
    Type: Application
    Filed: June 29, 2010
    Publication date: January 13, 2011
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventors: Yong-Wang Liu, Wen-cai Lu, Sterling Smith