Abstract: A thin film transistor array substrate is provided with a gate line assembly, a data line assembly, and thin film transistors. The data line assembly crosses over the gate line assembly while defining pixel regions. A pixel electrode is formed at each pixel region. A color filter substrate is provided with a black matrix, and color filters of red, green and blue are formed at the black matrix at the pixel regions. An overcoat layer covers the color filters, and a common electrode is formed on the overcoat layer with an opening pattern. The thin film transistor array substrate, and the color filter substrates face each other, and a liquid crystal material is injected between the thin film transistor array substrate, and the color filter substrate. The blue color filter has a thickness smaller than the red color filter or the green color filter such that the liquid crystal cell gap at the blue color filter is larger than the liquid crystal cell gap at the red or green color filter.

Abstract: A liquid crystal display includes first and second substrates. The first substrate has a first insulating substrate, and a pixel electrode formed on the first insulating substrate with a first opening pattern. The second substrate has a second insulating substrate, and a common electrode formed on the second insulating substrate with a second opening pattern. The first and the second opening patterns proceed parallel to each other while being arranged in an alternate manner. A liquid crystal material is injected between the first and the second substrates. A spacer is positioned at an end of the second opening pattern to maintain the distance between the first and the second substrates.

Abstract: In a method of fabricating a thin film transistor array substrate, a black matrix with horizontal and vertical portions is first formed on a substrate with an opaque conductive material. A gate line assembly is formed on the black matrix, and buffer layers are formed between the separate portions of the black matrix. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited onto the substrate. And a data line assembly is formed on the ohmic contact layer. The ohmic contact layer exposed through the data line assembly is etched, and a protective layer is deposited onto the substrate. The protective layer, the gate insulating layer, and the semiconductor layer are patterned to form contact holes and opening portions exposing the insulating layer at pixel areas. The peripheral portions of the black matrix are also exposed through the opening portions.