Patents by Inventor Yong Woon Jeon

Yong Woon Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240104035
    Abstract: An SSD device comprises a first port linking up with a first host using a first link, a second port linking up with the first host or a second host using a second link, and a port mode controller controlling the first port and the second port to change an operating mode from a dual port mode, in which the first port and the second port operate independently of each other, to a single port mode, in which only the first port operates. The port mode controller controls the second port to reset the second link in a state where the first link is linked up.
    Type: Application
    Filed: December 8, 2023
    Publication date: March 28, 2024
    Inventors: Yong Tae JEON, Ji Woon YANG, Dae Sik PARK
  • Patent number: 11940942
    Abstract: A Peripheral Component Interconnect Express (PCIe) interface device includes a transaction layer generating a transaction packet for transmission of a transaction, a data link layer generating a link packet including a protection code and a sequence number for the transaction packet and a link packet including a sequence number on the basis of the transaction packet, a physical layer generating a physical packet on the basis of the link packet and sequentially outputting the physical packet, a link training module performing negotiation for a link coupled through the physical layer and maintaining data information based on whether a link down occurring when the negotiation for the link is not performed is requested by a host or not, and a PCIe register storing information about the transaction layer, the data link layer, the physical layer, and the link training module.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: March 26, 2024
    Assignee: SK hynix Inc.
    Inventors: Yong Tae Jeon, Ji Woon Yang
  • Patent number: 11921657
    Abstract: A Peripheral Component Interconnect Express (PCIe) interface device may include a PCIe layer, a link training module, a PCIe register, and a PCIe controller. The PCIe layer may perform communication between a host and a Direct Memory Access (DMA) device. The link training module may perform a link training for the host. The PCIe register may store data information on the PCIe layer. The PCIe controller may switch an operating clock from a PCIe clock, generated based on a reference clock, to an internal clock, process data of the PCIe layer on the basis of the internal clock, and control the link training module to recover a link for the host, when a reset signal received from the host is asserted or the reference clock is off.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: March 5, 2024
    Assignee: SK HYNIX INC.
    Inventors: Yong Tae Jeon, Ji Woon Yang, Dae Sik Park
  • Publication number: 20240044504
    Abstract: A cooking appliance includes a casing having a cavity therein, and a door opening and closing the cavity. In addition, a door locking device disposed in the casing catches the door to turn the door into a locked state. The door locking device includes a rotatable latch, and a locking head assembled to the latch. When a head fastener coupling the locking head to the latch is separated from the locking head, the locking head is separable from the latch.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 8, 2024
    Applicant: LG ELECTRONICS INC.
    Inventors: Myeong Su SHIN, Yong Woon JEON
  • Patent number: D745112
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: December 8, 2015
    Assignee: Parker-Hannifin Corporation
    Inventors: Clyde B Stevens, Dennis C Allen, Hao Zhang, James Howland, Michelle Tauchen, Shawn Vogel, Stephen Brunton, Yong Woon Jeon, Peter Stambro, Raymond E Collett