Patents by Inventor Yong-yoong Chai

Yong-yoong Chai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11152801
    Abstract: Provided is an energy level conversion circuit for a portable energy storage apparatus, and includes a motherboard circuit to connect a plurality of sub-board circuits in series through female connectors, wherein the sub-board circuits receive input of direct current (DC) power, convert it to a preset energy level and output it, and the sub-board circuits connected or inserted into the motherboard circuit through the female connectors, and including a switching unit which is switched by a pair of switching pulses (P1, P2) applied from the motherboard circuit, so that when each switching transistor (Q1, Q2) is on/off, power transformed through a transformer is outputted through secondary side transformer tap connection terminals (T1, T2), wherein the sub-board circuits are connected in series through a female connector unit of the motherboard circuit, so that DC power whose energy level is converted as much as the number of the sub-board circuits is outputted through the motherboard circuit.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: October 19, 2021
    Assignee: ENERCAMP CO., LTD.
    Inventors: Yong Yoong Chai, Sang Deok Choi, Jungsub Choi
  • Publication number: 20210091579
    Abstract: Provided is an energy level conversion circuit for a portable energy storage apparatus, and includes a motherboard circuit to connect a plurality of sub-board circuits in series through female connectors, wherein the sub-board circuits receive input of direct current (DC) power, convert it to a preset energy level and output it, and the sub-board circuits connected or inserted into the motherboard circuit through the female connectors, and including a switching unit which is switched by a pair of switching pulses (P1, P2) applied from the motherboard circuit, so that when each switching transistor (Q1, Q2) is on/off, power transformed through a transformer is outputted through secondary side transformer tap connection terminals (T1, T2), wherein the sub-board circuits are connected in series through a female connector unit of the motherboard circuit, so that DC power whose energy level is converted as much as the number of the sub-board circuits is outputted through the motherboard circuit.
    Type: Application
    Filed: December 6, 2018
    Publication date: March 25, 2021
    Inventors: Yong Yoong CHAI, Sang Deok CHOI, Jungsub CHOI
  • Patent number: 6346834
    Abstract: A power on reset (POR) circuit in a semiconductor device which is process independent and resistant to noise present in a power supply voltage when the power supply voltage has not yet obtained a predetermined operational voltage level. The POR circuit includes a differential amplifier, a non-inverting input control circuit and an inverting input control circuit. The differential amplifier senses and amplifies a difference in voltage between the non-inverting input terminal and the inverting input terminal. The non-inverting input control circuit controls a voltage of the non-inverting input terminal of the differential amplifier. The inverting input control circuit controls a voltage of the inverting input terminal of the differential amplifier.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: February 12, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-yoong Chai
  • Patent number: 5761118
    Abstract: A programming apparatus for analog storage media such as an E.sup.2 PROM, which employs a LUT to perform a programming operation and a reading operation at the same time without separation into two operational cycles. The apparatus includes a transistor having a control gate, a floating gate, a source, and a drain, the control gate and source being grounded during a program operation, a Look-up-table which is operatively connected to the drain, a comparator having a non-inverting terminal which is operatively connected to the Look-up-table, a high programming-voltage generator (HPG) having disable terminal connected to an output terminal of the comparator, an adder for adding an output signal of the HPG and an input supply voltage, and for providing a resultant output signal to an inverting terminal of the comparator, and a resistor connected between an output terminal of the HPG and the drain of the transistor.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: June 2, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-Yoong Chai
  • Patent number: 5606522
    Abstract: An analog memory includes a cell array, a comparator, a mode selector, and a controller. The cell array includes a plurality of memory cells each having a control gate an injector, and a floating gate, and a first input part of a differential input stage. A first high-voltage pulse signal is applied to the control gate and a second high-voltage pulse signal is applied to the injector. Charges are injected into or are erased from the floating gate through the injector. The comparator has a differential input port whose first input is a reference voltage signal and whose second input is a floating gate voltage signal of one of the plurality of memory cells. The comparator compares and outputs the difference between the reference voltage signal and the floating gate voltage signal.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: February 25, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-Yoong Chai