Abstract: The present disclosure relates to electronic devices and communication systems. One example electronic device includes a power divider array that includes a general input port and a plurality of branch output ports. The power divider array has a filter mode and a power splitter mode that are switchable. In the power splitter mode, the power divider array is configured to implement power distribution of a signal from the general input port to the plurality of branch output ports. In the filter mode, the power divider array is configured to filter a signal transmitted between the general input port and the plurality of branch output ports.

Abstract: This application provides an operational amplifier and a start-up circuit of the operational amplifier. The start-up circuit has the advantages of having a simple structure and consuming less. The operational amplifier includes a multi-stage amplifier and a start-up circuit, where the start-up circuit includes a first start-up transistor and a second start-up transistor. A source of the first start-up transistor and a source of the second start-up transistor are connected to a tail bias node of a first-stage amplifier in the multi-stage amplifier, a gate of the first start-up transistor and a gate of the second start-up transistor are configured to connect to a first bias voltage Vb, and a drain of the first start-up transistor and a drain of the second start-up transistor are connected to input terminals of a second-stage or higher-stage amplifier.

Abstract: This application provides a multi-band low noise amplifier, including: an input end, a first input matching network, a second input matching network, a first amplifier, and a second amplifier. The input end is coupled to an antenna and is configured to receive an inter-band carrier aggregation signal, where the inter-band carrier aggregation signal includes a first carrier signal located in a first band and a second carrier signal located in a second band, and the first band is different from and does not overlap the second band. The first input matching network is coupled between the input end and the first amplifier and is configured to perform impedance matching for the first carrier signal. The second input matching network is coupled between the input end and the second amplifier and is configured to perform impedance matching for the second carrier signal.

Abstract: A phased array includes a local oscillator signal adjustment path, a first adder, a first power divider, and a plurality of radio-frequency signal transmit channels. An output end of the local oscillator signal adjustment path is coupled to a first input end of the first adder, and is configured to input a first signal to the first adder. A second input end of the first adder is coupled to a transmit path, and is configured to receive a second signal, and the first adder superimposes the first signal on the second signal to generate a to-be-transmitted signal. An input end of the first power divider is coupled to an output end of the first adder, an output end of the first power divider is coupled to input ends of the plurality of radio-frequency signal transmit channels.

Abstract: Example multi-band phased array are described. One example multi-band phased array includes a plurality of branches coupled to a plurality of multi-band antennas. Each of the plurality of branches includes a low noise amplifier and a power amplifier. The power amplifier and the low noise amplifier are configured to transmit and receive, in a time-sharing manner, a signal of a first frequency band and a signal of a second frequency band that are received by the multi-band phased array, and the first frequency band and the second frequency band are different and do not overlap. Each of the plurality of branches further includes a phase shifter, where the phase shifter is configured to perform phase shifting on the signal of the first frequency band, and the phase shifter is further configured to perform phase shifting on the signal of the second frequency band.

Abstract: This application provides an operational amplifier that increases the stability and settling speed of a common-mode feedback circuit. The operational amplifier includes N stages of amplifiers connected in series and M common-mode feedback circuits, where N and M are integers, N?3, and N?M>1. An ith common-mode feedback circuit in the M common-mode feedback circuits is configured to: detect a common-mode output voltage of a (j+b)th stage of amplifier, and regulate an electrical parameter of at least one of the jth stage of amplifier to the (j+b)th stage of amplifier, to stabilize the common-mode output voltage of the (j+b)th stage of amplifier. An Mth common-mode feedback circuit is configured to detect and stabilize a common-mode output voltage of an Nth stage of amplifier. Herein i, j, and b are integers, M?i?1, N?j?1, i?j, j+b?N, and b?0.

Abstract: This application provides an operational amplifier and a start-up circuit of the operational amplifier. The start-up circuit has advantages of simple structure and low power consumption. The operational amplifier includes a multi-stage amplifier and a start-up circuit, where the start-up circuit includes: a first start-up transistor M16 and a second start-up transistor M17, a source of the first start-up transistor M16 and a source of the second start-up transistor M17 are connected to a tail bias node of a first-stage amplifier in the multi-stage amplifier, a gate of the first start-up transistor M16 and a gate of the second start-up transistor M17 are configured to connect to a first bias voltage Vb, and a drain of the first start-up transistor M16 and a drain of the second start-up transistor M17 are connected to input terminals of a second-stage or higher-stage amplifier.

Abstract: A switch, an antenna tuner, and a radio frequency apparatus are provided. The switch includes: 2N successively serially connected transistors. In the 2N successively serially connected transistors, control ends of any two transistors with closest odd sequence numbers are coupled to each other through a first resistor, and control ends of any two transistors with closest even sequence numbers are coupled to each other through a second resistor; a control end of an n-th transistor is coupled to a first control signal in a switch control signal, and a control end of an (n+1)-th transistor is coupled to the first control signal, where n is an integer that is greater than or equal to 1 and is less than or equal to 2N?1, N is an integer greater than or equal to 2, and the first control signal is used to control turn-on or turn-off of the switch.

Abstract: A switch, an antenna tuner, and a radio frequency apparatus are provided. The switch includes: 2N successively serially connected transistors. In the 2N successively serially connected transistors, control ends of any two transistors with closest odd sequence numbers are coupled to each other through a first resistor, and control ends of any two transistors with closest even sequence numbers are coupled to each other through a second resistor; a control end of an n-th transistor is coupled to a first control signal in a switch control signal, and a control end of an (n+1)-th transistor is coupled to the first control signal, where n is an integer that is greater than or equal to 1 and is less than or equal to 2N?1, N is an integer greater than or equal to 2, and the first control signal is used to control turn-on or turn-off of the switch.